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Rabbit 3000 Microprocessor
The control/status register for Timer B (TBCSR) is laid out as shown in Table 11-7.
The control register for Timer B (TBCR) is laid out as shown in Table 11-8.
The MSB x registers for Timer B (TBM1R/TBM2R) are laid out as shown in Table 11-9.
11.2.1 Using Timer B
Normally the prescaler is set to divide perclk/2 by a number that provides a counting rate
appropriate to the problem. For example, if the clock is 22.1184 MHz, then perclk/2 is
11.0592 MHz. A Timer B clock rate of 11.0592 MHz will cause a complete cycle of the
10-bit clock in 92.6 µs.
Normally an interrupt will occur when either of the comparators in Timer B generates a
pulse. The interrupt routine must detect which comparator is responsible for the interrupt
and dispatch the interrupt to a service routine. The service routine sets up the next match
value, which will become the match value after the next interrupt. If the clocked parallel
ports are being used, then a value will normally be loaded into some bits of the parallel
port register. These bits will become the output bits on the next match pulse. (It is neces-
sary to keep a shadow register for the parallel port unless the bit-addressable feature of
ports D and E is used.)
Table 11-7. Timer B Control and Status Register (TBCSR) (adr = 0B0h)
Bits 7:3
Bit 2
Bit 1
Bit 0
Not used
1—A match with match
register 2 was detected.
This bit is cleared when
this register is read;
setting this bit to 1 enables
the interrupt.
1—A match with match
register 1 was detected.
This bit is cleared when
this register is read;
setting this bit to 1 enables
the interrupt.
1—Enable the main clock
for this timer.
Table 11-8. Timer B Control Register (TBCR)
Bits 7:4
Bits 3:2
Bits 1:0
Not used
00—Counter clocked by perclk/2
01—Counter clocked by output of timer A1
1x—Timer clocked by perclk/2 divided by 8
00—Interrupt disabled
xx—Interrupt priority xx enabled.
Table 11-9. Timer B MSB x Register (TBM1R/TBM2R = 0B2h/0B4h)
Bits 7:6
Bits 5:0
Two most significant bits of timer
match preload register.
Not used.
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