User’s Manual
123
12.2 Serial Port Interrupt
A common interrupt vector is used for the receive and transmit interrupts. There is a sepa-
rate interrupt request flip-flop for the receiver and transmitter. If either of these flip-flops
is set, a serial port interrupt is requested. The flip-flops are set by a rising edge only. The
flip-flops are cleared by a pulse generated by an I/O read or write operation as shown in
Figure 12-3. When an interrupt is requested, it will take place immediately when priorities
allow and an instruction execution is complete. The interrupt is lost if the request flip-flop
is cleared before the interrupt takes place. If the flip-flop is not cleared in the interrupt,
another interrupt will take place when priorities are lowered.
Figure 12-3. Generation of Serial Port Interrupts
The receive interrupt request flip-flop is set after the stop bit is sampled on receive, nomi-
nally one half of the way through the stop bit. Data bits are transferred on this same clock
from the receive shift register to the receive data register.
The transmit interrupt request flip-flop is set on the leading edge of the stop bit for data
register empty and at the trailing edge of the stop bit for shift register empty (transmitter
idle). Unless the data register is empty on this trailing edge of the stop bit, the transmitter
does not become idle. The transmitter becomes idle only if the data register is empty at the
trailing edge of the stop bit.
The serial port interrupt vectors are shown in Table 7-11.
Transmitter IRQ
Request Interrupt
Receiver IRQ
Transmitter Data
Buffer Empty or Trans-
mitter not Busy
Receiver Data
Buffer Full
Read Receiver
Data Register
Write Transmitter Data
Register or
Write Status Register
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