Quectel FCM561D-P, Проектирование аппаратного обеспечения

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Wi-Fi&Bluetooth Module Series
FCM561D-P_Hardware_Design 8 /
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Figure Index
Figure 1 : Pin Assignment (Top View) ....................................................................................................... 13
Figure 2 : SPI Connection .......................................................................................................................... 23
Figure 3 : QSPI Connection ....................................................................................................................... 24
Figure 4 : UART1 Connection .................................................................................................................... 25
Figure 5 : SDIO Interface Connection ........................................................................................................ 26
Figure 6 : VBAT Reference Circuit ............................................................................................................. 35
Figure 7 : Turn-on Timing ........................................................................................................................... 36
Figure 8 : Reference Circuit of CHIP_EN by Using A Driving Circuit ........................................................ 37
Figure 9 : Reference Circuit of RESET with A Button ............................................................................... 37
Figure 10 : Reset Timing ............................................................................................................................ 37
Figure 11 : RF Antenna Reference Design ................................................................................................ 40
Figure 12 : Microstrip Design on a 2-layer PCB ........................................................................................ 41
Figure 13 : Coplanar Waveguide Design on a 2-layer PCB ...................................................................... 41
Figure 14 : Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) ................... 42
Figure 15 : Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) ................... 42
Figure 16 : Keepout Area on Motherboard ................................................................................................ 43
Figure 17 : Prohibited Area for Routing ..................................................................................................... 44
Figure 18 : FCM561D-P Top and Side Dimensions .................................................................................. 48
Figure 19 : FCM561D-P Bottom Dimensions (Bottom View) ..................................................................... 49
Figure 20 : FCM561D-P Recommended Footprint .................................................................................... 50
Figure 21 : FCM561D-P Top and Bottom Views (PCB Antenna Interface) ............................................... 51
Figure 22 : Recommended Reflow Soldering Thermal Profile .................................................................. 53
Figure 23 : Tape Specifications .................................................................................................................. 55
Figure 24 : Plastic Reel Dimension Drawing ............................................................................................. 56
Figure 25 : Mounting Direction ................................................................................................................... 56
Figure 26 : Packaging Process .................................................................................................................. 57