Wi-Fi&Bluetooth Module Series
FCM561D-P_Hardware_Design
24 / 65
3.4.2. QSPI
In the case of multiplexing, the module embeds 1 Quad SPI that provides support for communicating
with external flash, PSRAM or AMOLED display. The QSPI allows maximum clock frequency up to
80 MHz.
Table 8: Pin Definition of QSPI
The following figure shows the QSPI connection between the host and the slave:
QSPI_CS
QSPI_CLK
QSPI (Host)
QSPI (Slave)
QSPI_CS
QSPI_DATA[0:3]
QSPI_CLK
QSPI_DATA[0:3]
Figure 3: QSPI Connection
3.4.3. UARTs
The module provides 3 UARTs, among which UART1 is default configuration while UART2 and UART3
are multiplexed with GPIOs. The interfaces support full-duplex asynchronous serial communication at a
baud rate up to 2 Mbps. UART1 supports hardware flow control with RTS and CTS signals, flash
download and debugging information output. Each UART embeds a 128-byte Tx FIFO and a 128-byte
Rx FIFO. FIFO mode is disabled by default and can be enabled by software.
Pin Name
Pin No.
Multiplexing Function
I/O
Description
GPIO22
28
QSPI_CLK
DIO
QSPI clock
GPIO23
27
QSPI_CS
DIO
QSPI chip select
GPIO24
72
QSPI_DATA0
DIO
QSPI data bit 0
GPIO25
71
QSPI_DATA1
DIO
QSPI data bit 1
GPIO26
70
QSPI_DATA2
DIO
QSPI data bit 2
GPIO27
11
QSPI_DATA3
DIO
QSPI data bit 3