LTE-A Module Series
EM121R-GL Hardware Design
EM121R-GL Hardware Design 45 / 80
VCC
FULL_CARD_POWER_OFF#
RESET#
PCIE_RST_N
Module State
T2
OFF
Power off procedure
Active
T1
Figure 22: PCIe Turn-off Timing through FULL_CARD_POWER_OFF#
Table 18: PCIe Turn-off Timing through FULL_CARD_POWER_OFF#
4.3.3.3. PCIe Reset Timing
RESET# pin is used to reset the module. FULL_CARD_POWER_OFF# is driven low during system reset.
VCC(H)
RESET#
FULL_CARD_POWER_OFF#
PCIE_RST_N
Module State
T2
Booting
Resetting
Active
T1
T3
T4
Active
T5
Typical 11.6 s
Figure 23: PCIe Reset Timing
Index
Min.
Typ.
Max.
Comment
T1
20 ms
-
-
PCIe interface is disabled by asserting PCIE_RST_N.
T2
3 s
-
-
Module is powering off and it stops reading and writing
Flash, data protection, etc. If the power is always on, T2
could be ignored.