LTE-A Module Series
EM121R-GL Hardware Design
EM121R-GL Hardware Design 23 / 80
50
PCIE_RST_N
DI, OD
PCIe reset.
Active LOW.
51
GND
Ground
52
PCIE_CLKREQ_N DO, OD
PCIe clock request.
Active LOW.
53
PCIE_REFCLK_M
AIO
PCIe reference clock (-)
54
PCIE_WAKE_N
DO, OD
PCIe wake up.
Active LOW.
55
PCIE_REFCLK_P
AIO
PCIe reference clock
(+)
56
RFFE_CLK
2) *
DO, PD
Used for external MIPI
IC control
1.8 V
57
GND
Ground
58
RFFE_DATA
2) *
DIO, PD
Used for external MIPI
IC control
1.8 V
59
ANTCTL0*
DO, PD
Antenna control
1.8 V
60
WLAN_PA_EN*
DI, PD
Self-protection for
QLN4650 control
1.8 V
61
ANTCTL1*
DO, PD
Antenna control
1.8 V
62
COEX_RXD*
DI, PD
LTE/WLAN coexistence
receive
1.8 V
63
ANTCTL2*
DO, PD
Antenna control
1.8 V
64
COEX_TXD*
DO, PD
LTE/WLAN coexistence
transmit
1.8 V
65
ANTCTL3*
DO, PD
Antenna control
1.8 V
66
USIM1_DET
DI, PU
(U)SIM1 card hot-plug
detect
1.8 V
Internally pulled
up to 1.8 V
1)
67
RESET#
DI, PU
Reset the module.
Active LOW.
V
IH
max = 2.1 V
V
IH
min = 1.3 V
V
IL
max = 0.5 V
Internally pulled
up to 1.8 V with a
40
kΩ resistor.
68
ANT_CONFIG
3)
DI, PU
Antenna configuration
1.8 V
Internally pulled
up to 1.8 V
69
CONFIG_1
DO
Connected to GND
internally
70
VCC
PI
Power supply
Vmin = 3.135 V
Vnom = 3.7 V
Vmax = 4.4 V