LTE-A Module Series
EM120R-GL&EM160R-GL Hardware Design
EM120R-GL&EM160R-GL_Hardware_Design 19 / 79
off.
When it is at high level,
the module is powered
on.
7
USB_D+
USB_DP
AI/AO
USB 2.0 differential data
bus (+)
8
W_DISABLE1#
W_DISABLE1#
DI
Airplane mode control.
Active low.
1.8/3.3 V power
domain
9
USB_D-
USB_DM
AI/AO
USB 2.0 differential data
bus (-)
10
GPIO_9
WWAN_LED#
OD
RF status indication.
Active low.
11
GND
GND
Ground
12
Key
Notch
Notch
13
Key
Notch
Notch
14
Key
Notch
Notch
15
Key
Notch
Notch
16
Key
Notch
Notch
17
Key
Notch
Notch
18
Key
Notch
Notch
19
Key
Notch
Notch
20
GPIO_5
(AUDIO_0)
PCM_CLK
DI
PCM data bit clock.
In master mode, it is an
output signal.
In slave mode, it is an
input signal.
1.8 V power
domain.
If unused, keep it
open.
21
CONFIG_0
CONFIG_0
EM120R-GL: Connected
to GND internally;
EM160R-GL: NC
22
GPIO_6
(AUDIO_1)
PCM_DIN
PO
PCM data input
1.8 V power
domain
23
GPIO_11
(WOWWAN#)
WAKE_ON_
WAN#
OD
Wake up the host.
Active low.
1.8/3.3 V power
domain
24
GPIO_7
(AUDIO_2)
PCM_DOUT
/VDDIO
DO/P
O
PCM data output;
Could be designed to be
compatible with 1.8 V
power supply.
1.8 V power
domain