LTE Standard Module Series
EG21-G Reference Design
EG21-G_Reference_Design 8 / 8
1.2.3.
Resetting Scenario
V
IL
≤0.5V
V
IH
≥1.3V
VBAT
≥150ms
Resetting
Module
Status
Running
RESET_N
Restart
≤460ms
Figure 3: Timing of Resetting Module
1.
Please ensure that there is no large capacitance with the max value exceeding 10nF on PWRKEY
and RESET_N pins.
2.
RESET_N only resets the internal baseband chip of the module and does not reset the power
management chip.
3. It is recommended to use RESET_N only when failing to turn off the module by
AT+QPOWD
command or PWRKEY pin.
1.3.
Schematics
The schematics illustrated in the following pages are provided for your reference only.
NOTES
