background image

TITLE

PROJECT

Lorry XU

Woody WU

CHECKED BY

DRAWN BY

OF

A

6

5

4

3

2

1

SHEET

A

B

C

D

1

2

3

4

5

6

D

C

B

Quectel Wireless Solutions

SIZE

VER

14

7

1.0

DATE

2019/12/5

EG21-G

A2

Reference Design

Audio Codec Design (ALC5616)

1. ALC5616 power-on sequence: DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD -> MICVDD -> software initialization.

Notes:

2. ALC5616 power-off sequence: close codec function by software -> MICVDD -> DBVDD/I2C pull-up power/AVDD/DACREF/CPVDD.
3. EG21-G will automatically initialize the codec via I2C interface after it is turned on successfully, so all power supplies for the codec need to be powered on before that.

4. Pin AGND and DGND of ALC5616 are connected together through 0R resisitor R0703.

5. The maximum output power of the codec is 30mW when the headphone driver with 32Ω load is used.

2 IN1P/DMC_DAT

3 IN2P

4 IN2N/JD2

5

DACREF

6

AVDD

7

AG

ND

10

LOUTR/N

11

CPN2

12

CPP2

13

CPN1

14

CPP1

15

CPVDD

16

CPVPP

18

CPVREF

19

CPVEE

20

HPO_L

21 ADCDAT1

22 DACDAT1

23 LRCK1

26

SCL

27

SDA

28 GPIO1/IRQ1

29

DBVDD

30

DCVDD

31

M

ICVDD

32 MICBIAS1

8

VREF2

24 BCLK1

1 JD1

9

LOUTL/P

17

HPO_R

25 MCLK

33

DG

ND

U0501

ALC5616

C0504

4.7μF

C0505

4.7μF

C0506

100nF

R0503

0R

C0502

4.7μF

C0503

100nF

C

0511

2.2μF

C

0512

100nF

C

0507

4.7μF

C

0508

100nF

C

0510

2.2μF

C0514 2.2μF

C0516 2.2μF

C0513

4.7μF

R0507

0R

R0516

NM_10K

R0517

4.7K

R0518

4.7K

C0528

4.7μF

C0523

2.2μF

C0524

2.2μF

R0509

0R

R0511

0R

R0513

0R

R0515

0R

C0526

NM

C0525

NM

C0527

NM

C0515 2.2μF
C0517

2.2μF

R0514

1K

R0506

1.5K

R0505

1K

R0508

1.5K

C0519

10μF

R0502

0R

C0518

1μF

C0520

1μF

C0521

1μF

C0522

1μF

R0510

0R

R0512

0R

R0501

0R

R0504

0R

C

0509

N

M

_33pF

C0501

NM_33pF

R0519

0R

R0520

0R

VD

D

_3.3V

VDD_1

V

8

VDD_3.3V

[3,8]

I2C_SDA

[3,8]

I2C_SCL

VDD_1

V

8

VDD_1V8

[3,8] CODEC_PCM_OUT

[3,8]

CODEC_PCM_IN

[3,8] CODEC_PCM_CLK
[3,8] CODEC_PCM_SYNC

[7] MIC+
[7] MIC-

[8,9]

SPK_P

[8,9]

SPK_N

MICBIAS

[8,9] MIC_P
[8,9] MIC_N

MICBIAS

[7]

MIC+

[7]

MIC-

VDD_1V8

[8,9]

SPK_R

[8,9]

SPK_L

Содержание EG21-G

Страница 1: ...EG21 G Reference Design LTE Standard Module Series Rev EG21 G_Reference_Design_V1 0 Date 2019 12 05 Status Released www quectel com...

Страница 2: ...RS THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INF...

Страница 3: ...LTE Standard Module Series EG21 G Reference Design EG21 G_Reference_Design 2 8 About the Document Revision History Revision Date Author Description 1 0 2019 12 05 Lim PENG Woody WU Initial...

Страница 4: ..._Reference_Design 3 8 Contents About the Document 2 Contents 3 Figure Index 4 1 Reference Design 5 1 1 Introduction 5 1 2 Power on off and Resetting Scenarios 6 1 2 1 Power on Scenario 6 1 2 2 Power o...

Страница 5: ...Standard Module Series EG21 G Reference Design EG21 G_Reference_Design 4 8 Figure Index FIGURE 1 TIMING OF TURNING ON MODULE 6 FIGURE 2 TIMING OF TURNING OFF MODULE 7 FIGURE 3 TIMING OF RESETTING MODU...

Страница 6: ...8 1 Reference Design 1 1 Introduction This document provides the reference design for Quectel EG21 G module And the reference design includes power on off resetting scenarios block diagrams of power s...

Страница 7: ...this time the BOOT_CONFIG pins can be set to high level by external circuit Figure 1 Timing of Turning on Module 1 Please make sure that VBAT is stable before pulling down PWRKEY pin The time between...

Страница 8: ...g off Module 1 In order to avoid damaging internal flash please do not switch off the power supply when the module works normally Only after the module is shut down by PWRKEY or AT command the power s...

Страница 9: ...e ensure that there is no large capacitance with the max value exceeding 10nF on PWRKEY and RESET_N pins 2 RESET_N only resets the internal baseband chip of the module and does not reset the power man...

Страница 10: ...CHECKED BY Woody WU Lorry XU Power Supply Block Diagram DC DC DC 5V OUT e g DC 12V IN DC 3 8V 2 0A EG21 G MIC29302WU MOS ON OFF USB_VBUS EN VBAT_EN SGM2019 ADJYN5G TR DC 3 3V SGM2019 ADJYN5G TR DC 1...

Страница 11: ...T_MAIN ADC0 ADC1 MAIN UART I2C ANT_MAIN WAKEUP_IN STATUS NET_MODE NET_STATUS MCU PWRKEY GPIO_03 GPIO_04 RESET_N GPIO_08 GPIO_05 W_DISABLE GPIO_06 USB USB 3 3V 1 8V ALC5616 TLV320AIC3104 or U SIM Card...

Страница 12: ...SDC2_CMD 34 VDD_SDIO 35 ANT_DIV 36 GND 37 RESERVED 38 RESERVED 39 RESERVED 40 RESERVED 41 I2C_SCL 42 I2C_SDA 43 RESERVED 44 ADC1 45 ADC0 46 GND 47 ANT_GNSS 48 GND 49 ANT_MAIN 50 GND 51 GND 52 GND 53 G...

Страница 13: ...etect the MCU s sleep state For more details please refer to It is used to wake up the module It is used to let the module enter airplane mode 4 WAKEUP_IN_EG21 G should be kept at low level before the...

Страница 14: ...o ensure the audio codec Power on Sequence power on VDD_1V8 first then VDD_3 3V Note 1 If VDD_3 3V power supply needs to be switched off please keep CODEC_POWER_EN at high level SGMII It is used when...

Страница 15: ...ic capacitance should not be more than 15pF and should be placed close to the U SIM card connector 6 For more information about the layout please refer to For more information about TXS0108E please re...

Страница 16: ...D 7 AGND 10 LOUTR N 11 CPN2 12 CPP2 13 CPN1 14 CPP1 15 CPVDD 16 CPVPP 18 CPVREF 19 CPVEE 20 HPO_L 21 ADCDAT1 22 DACDAT1 23 LRCK1 26 SCL 27 SDA 28 GPIO1 IRQ1 29 DBVDD 30 DCVDD 31 MICVDD 32 MICBIAS1 8 V...

Страница 17: ...when the surround stereo headphone driver with 32 load is used and is 30mW when the surround stereo headphone driver with 16 load is used 1 MCLK 2 BCLK 3 WCLK 4 DIN 5 DOUT 6 DVSS 7 IOVDD 8 SCL 9 SDA...

Страница 18: ...aces need to be routed as differential pairs 4 All MIC and SPK signal traces should be routed with total grounding and far away from noise such as clock and DC DC signals etc 5 ALC5616 and TLV320AIC31...

Страница 19: ...to use AT command to turn off diversity reception For more details of the AT command please refer to 3 If an active antenna is selected for the GNSS antenna a VDD power supply circuit is required if...

Страница 20: ...close as possible beside the module with a 1 5k pull up resistor away from other signal traces L0901 C0913 and C0914 need to be placed close to Pin 3 2 SGMII data and control signals should be strictl...

Страница 21: ...0 and the reference ground of the area should be complete 2 Keep skew of the MDI differential signals less than 20mil and the maximum trace length must be less than10 inches 3 The connection method be...

Страница 22: ...sufficient current up to 0 8A needs to be provided 1 The pin 34 VDD_SDIO on the module can only be used for SDIO pull up resistors and its maximum output current is 50mA Notes The bypass capacitors C...

Страница 23: ...is in sleep replace the power supply of indicators with controllable one 4 The module s debug UART interface supports 1 8V power domain Turn off the power when the module enters sleep mode 1 It is rec...

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