LTE Module Series
EC25 Mini PCIe Hardware Design
EC25_Mini_PCIe_Hardware_Design Confidential / Released 22 / 42
The UART interface supports 9600, 19200, 38400, 57600, 115200 and 230400bps baud rate. The default
is 115200bps. This interface can be used for AT command communication.
AT+IPR
command can be used to set the baud rate of the UART, and
AT+IFC
command can be used to
set the hardware flow control (hardware flow control is disabled by default). Please refer to
document [2]
for details.
3.7. PCM and I2C Interfaces
The following table shows the pin definition of PCM and 12C interfaces that can be applied in audio codec
design.
Table 9: Pin Definition of PCM and I2C Interfaces
EC25 Mini PCIe provides one PCM digital interface, which supports 8-bit A-law* and
μ-law*, and also
supports 16-bit linear data formats and the following modes:
Primary mode (short frame synchronization, works as either master or slave)
Auxiliary mode (long frame synchronization, works as master only)
“*” means under development.
Pin No.
Pin Name
I/O
Power Domain
Description
45
PCM_CLK
IO
1.8V
PCM clock signal
47
PCM_DOUT
DO
1.8V
PCM data output
49
PCM_DIN
DI
1.8V
PCM data input
51
PCM_SYNC
IO
1.8V
PCM frame synchronization
30
I2C_SCL
DO
1.8V
I2C serial clock, require external
pull-up to 1.8V.
32
I2C_SDA
IO
1.8V
I2C serial data, require external
pull-up to 1.8V.
NOTE
NOTE
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