F U N C T I O N A L D E S C R I P T I O N
A . I N T E R R U P T E N A B L E R E G I S T E R
+-------+
D7 | 0 |
+-------+
D6 | 0 |
+-------+
D5 | 0 |
+-------+
D4 | 0 |
+-------+
D3 | EDSSI |----- MODEM status
+-------+
D2 | ELSI |----- Receiver line status
+-------+
D1 | ETBEI |----- Transmitter holding register empty
+-------+
D0 | ERBFI |----- Received data available
+-------+
Figure 3. Interrupt enable register bit definitions.
EDSSI - MODEM Status Interrupt:
W h e n s e t ( l o g i c 1 ) , e n a b l e s i n t e r r u p t o n c l e a r t o
s e n d , d a t a s e t r e a d y , r i n g i n d i c a t o r , a n d d a t a
carrier detect.
ELSI - Receiver Line Status Interrupt:
W h e n s e t ( l o g i c 1 ) , e n a b l e s i n t e r r u p t o n o v e r r u n ,
parity, and framing errors, and break indication.
ETBEI - Transmitter Holding Register Empty Interrupt:
W h e n s e t ( l o g i c 1 ) , e n a b l e s i n t e r r u p t o n
transmitter register empty.
ERBFI - Received Data Available Interrupt:
W h e n s e t ( l o g i c 1 ) , e n a b l e s i n t e r r u p t o n r e c e i v e d
data available or FIFO trigger level.
iii
