Quantum Design Advance 6A, Руководство пользователя

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Manual for Advance 6A/Advance 6B
Advanced Chipset Features Setup
Figure-5 Advanced Chipset Features Setup Menu
The following indicates the options for each item and describes their meaning.
Item Option Description
l Close Empty Enabled Closes empty DIMM or PCI clock to reduce
DIMM/PCI Clk EMI.
Disabled
Does not close empty DIMM or PCI clock.
l Bank 0/1, 2/3, 4/5
SDRAM 8/10ns
These items are of selected DRAM read/write
DRAM Timing
Normal
timing. Default setting is recommended.
Medium
Fast
Turbo
l SDRAM Cycle
2/3
Define the CLT timing parameter of SDRAM
Length
Auto
expressed in 66MHz clocks.
Latency Time = 2 clocks
Latency Time = 3 clocks
l DRAM Clock
Host Clk
DRAM frequency same as CPU FSB
Hclk+33M
Hclk-33M DRAM frequency is faster than CPU FSB by 33MHz.
l Memory Hole
15M-16M
Memory Hole at 15-16M is reserved for expanded
ISA card.
Disabled
Do not set this memory hole.
l P2C/C2P
Enabled
Enabled P2C/C2P concurrency
Concurrency
Disabled
Disable P2C/C2P concurrency
l Fast R-W Turn Enabled Enable Fast R-W Turn Around.
Around Disabled Disable Fast R-W Turn Around.
Award BIOS Description