ACT88326
Advanced PMU with Bypass Switch,
& Pushbutton Function
Data Sheet Rev. 3.0, Nov. 11, 2019 | Subject to change without notice
31 of 45
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input to the Load Switch should come from an
ACT88326 Buck, LDO, or other current limited source.
Load Switch POK
The load switch internal Power OK, POK, signal can be
used in the sequencing of other power supplies. The
load switch POK signal goes active when the load
switch gate drive voltage at the LSG pin is greater than
VIN + 1V and VIN – VOUT < 100mV. Note that the ac-
tual load switch may or may not be fully on at this time
depending on the FET used for the load switch or any
additional filtering or delay circuitry connected to LSG.
PC BOARD LAYOUT GUIDANCE
Proper parts placement and PCB layout are critical to
the operation of switching power supplies. Follow the
following layout guidelines when designing the
ACT88326 PCB. Refer to the Active-Semi ACT88326
Evaluation Kits for layout examples
1. Place the buck input capacitors as close as
possible to the IC. Refer to the Pin Descriptions
for each buck converter’s dedicated VINx and
PGNDx pins. Connect the input capacitors
directly to the corresponding VINx and PGNDx
power ground pin on the top layer. Routing
these traces on the top layer eliminates the
need for vias.
2. Minimize the switch node trace length between
each SW_Bx pin and the inductor. Optimal
switch node routing is to run the trace between
the input capacitor’s pads. Using 0805 sized
input capacitors is recommended. Avoid routing
sensitive analog signals near these high
frequency, high dV/dt traces.
3. Place the LDO input capacitor close to the AVIN
pin. Connect the capacitor directly to AVIN and
AGND on the top layer.
4. The Buck output capacitors should be placed
by the inductor and connected directly to the
inductor and ground plane with short and wide
traces. The output capacitor ground should
make a short connection to the input capacitor
ground. If required, use multiple vias.
5. Each regulator’s FB_Bx should be Kelvin
connected to its output capacitor through the
shortest possible route, while keeping sufficient
distance from switching nodes to prevent noise
injection. The IC regulates the output voltage to
this Kelvin connection.
6. The PGNDx and AGND ground pins must be
electrically connected together. Because the
AGND ground plane is used for analog, digital,
and LDO grounds, it does not need to be
completely isolated from the rest of the PCB
grounds. However, take care to avoid routing
the buck converter switching currents through
the analog ground connections.
7. Connect the VIN_IO input capacitor to the
AGND ground pin.
8. Remember that all open drain outputs need
pull-up resistors.
9. Figure 4 shows the recommended power and
signal connections and routing from under the
IC. Refer to the ACT88326 evaluation kit for a
full, detailed routing example.
(ES) Equipements Scientifiques SA - Département Composants & Modules - 127 rue de Buzenval BP 26 - 92380 Garches
Tél. 01 47 95 99 84 - Fax. 01 47 01 16 22 - e-mail: [email protected] - Site Web: www.es-france.com
