Manual for P6I440BX/B1S
Note: 1.If wanting to use this function, 5VSB line of the power supply should be
capable of delivering enough current (eg. 200mA) for all the devices con
nected to the keyboard port, or you can’t power up the system using the
keyboard.
2.If you set JP2 with pin2&pin3 closed, set “POWER ON Function” to
BUTTON ONLY, don’t set it to Password, or this will prevent you from
powering up your system.
3. If you encounter problems above, clear CMOS and set the jumper and
BIOS option properly again.
chapter 2
25
Memory Configuration
This motherboard provides three 168 pin 3.3V un-buffered DIMM sockets to support a
flexible memory size ranging from 8MB/384MB for SDRAM or from 8MB/768MB for EDO
memory. Both 66MHz/100MHz SDRAM with SPD and 66MHz EDO DIMMs are supported.
The following set of rules allows for optimum configurations.
Rules for populating a 440BX memory array:
Processors with 100MHz front-side bus should be paired only with 100MHz SDRAM.
Processors with 66MHz front-side bus can be paired with either 66MHz or 100MHz
SDRAM.
Using the serial presence detect (SPD) data structure, programmed into an E
2
PROM on
the DIMM, the BIOS can determine the SDRAM’s size and speed.
The DRAM Timing register, which provides the DRAM speed grade control for the entire
memory array, must be programmed to use the timing of the slowest DRAMs installed.
Possible SDRAM DIMM memory sizes are 8MB, 16MB, 32MB, 64MB, 128MB in each DIMM
socket.
Possible EDO DIMM memory sizes are 8MB, 16MB, 32MB, 64MB, 128MB, 256MB in each
DIMM socket.
