PT MPS1000, Руководство по оборудованию

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Chapter 2: Introduction
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Feature Rich Hardware
The MPS1000 is designed as a fully programmable communications system capable of
sustaining high data rates for a variety of protocols used in synchronous communications.
The MPS1000 utilizes single or dual Motorola MPC8255 PowerQUICC™ II communications
microprocessors. In a dual configuration, one of the processors is configured as the Master and
the other is configured as the Slave. The default mode of operation uses the Slave processor
with its CPU core disabled, leaving the CPM active for serial communication.
Two external Ethernet PHYs are offered to provide Ethernet redundancy. The MPS1000 will
automatically switch over to the secondary Ethernet PHY if link is lost on the primary PHY.
The MPS1000 supports eight or sixteen identical, individually programmable, synchronous
serial I/O ports. The ports are capable of electrically interfacing to V.35, RS442 (EIA530 or
RS449) and RS232 equipment. Each port is brought out in groups of four to an 80-pin
connector that supports Performance Technologies quad connection hydra line of serial I/O
cables.
A four-port version of the MPS1000 is capable of interfacing to EIA530 and RS232 equipment.
Each port is brought out to a DB25 male connector on the rear of the unit. No hydra cables are
required.
With rack-mountable or freestanding configurations, the MPS1000 provides the power to
handle full load network traffic, and communicates via TCP/IP with clients on the LAN.
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