Switch Configuration
39
SW2 (PCI Express/SRIO Configurations)
The PCI Express is set up with some parameters set by default, some settings controlled by
the MMC/shelf manager e-keying process, and some controlled by SW2. By default the PCI
Express port is set to be in an on state with the maximum number of lanes enabled for the
given build option. The remaining options are selected by using SW2 switches and by the
MMC's interaction with the shelf manager. This is further explained in the following topics.
Note: PCIe-only AMC131 boards at revisions 120Q060960 and lower have only one DIP
switch. The settings documented as SW2 in this document must be applied to the switch
marked SW1 on those boards.
SW2-1: PCIe Root Complex/Endpoint - SRIO Host/Agent
This switch functions differently depending on the build option. For build option 4, which has
both PCIe and SRIO ports active, the position of this switch applies to both PCIe and SRIO
simultaneously. See
.
Note: This switch must be set prior to power-on reset.
SW2-2: FCLKA Configuration - PCIe only
The choice of PCI Express clock source is normally made by the MMC through e-keying with
the AMC/ATCA shelf controller. The e-keying process can set up the AMC131 to source the
FCLKA, receive the FCLKA, or be isolated from the FCLKA. The AMC131 can also be forced to
receive the FCLKA from the system. SW2-2 tells the MMC what action is desired for FCLKA
selection. The settings for SW2-2 are shown in
If the AMC131 does not boot up when powered on, it is likely that FCLKA is not configured
properly for the specific carrier. For more information about configuring FCLKA on this AMC,
please contact PT Customer Support (see
“Customer Support and Services” on page 18
).
Table 3-3:
Setting the PCIe and SRIO Port Functions
SW2-1
Build Option 1 -
PCIe Interface Only
Build Option 3 -
SRIO Interface Only
Build Option 4 -
PCIE and SRIO Interfaces
OFF
(Default)
Sets PCIe port as Endpoint
Sets SRIO port as Agent
Sets PCIe port as Endpoint
and
Sets SRIO port as Agent
ON
Sets PCIe port as Root Complex
Sets SRIO port as Host
Sets PCIe port as Root Complex
and
Sets SRIO port as Host
Table 3-4:
Setting FCLKA
SW2-2
Function
OFF
Local clock source off. AMC PCIE FCLKA
connected
directly to MPC8641D PCIe Clock
Input. Use this setting in AMC.1 R1.0 carriers.
ON (Default)
The MMC e-keys the FCLKA setting for the AMC131 in compliance with AMC.1 R2.0
Содержание AMC131
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