ProSoft inRax MVI94-GSC-E, Руководство пользователя

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Reference MVI94-GSC-E ♦ FLEX Platform
User Manual Generic ASCII Comunication Module
ProSoft Technology, Inc.
Page 43 of 60
July 6, 2009
In order to pace the characters for the write operation, an inter-character delay
value is associated with each write message. For devices that do not buffer
received data, when interfacing with a modem in command mode or when
simulating keyboard or keypad entry, inter-character delays may be required. For
example, if the port is tied to a device that expects input with delays of 200
milliseconds between each character, place the data to send to the buffer along
with the length and set the inter-character word (byte 1) to a value of 200 in the
module’s output image in the processor’s ladder logic program. The message will
be transmitted with a 200-millisecond wait period between each character.
Because this delay value is sent from the processor for each write message, the
inter-character delay can be set independently for each message. For example,
when writing AT commands to a dial-up modem, an inter-character delay of 100
may be required. But when the modem is in data mode, the inter-character delay
can be set to 0. When the delay is set to 0, the whole packet of data will be
placed in the module’s transmit buffer at one time.
4.2.4 Control Blocks
The module recognizes control block codes of 254 (0xFE) and 255 (0xFF) from
the ladder logic for module control. The format and definition of these two blocks
are provided in the following topics.
Warm Boot
This block is sent from the Flex processor to the module (output image) when the
module is required to perform a warm-boot (software reset) operation. This
operation will force the module to restart by reading in the configuration
information and resetting all program status data. The format of the output image
to perform this task is as follows:
Byte Offset Description
0 Block Sequence Number set to 254 (0xFE)
1 to 13 Not Used
Cold Boot
This block is sent from the Flex processor to the module (output image) when the
module is required to perform the cold boot (hardware reset) operation. This
block is sent to the module when a hardware problem is detected by the ladder
logic that requires a hardware reset. The format of the output image to perform
this task is as follows:
Byte Offset Description
0 Block Sequence Number set to 255 (0xFF)
1 to 13 Not Used