BIOS Setup Information
WADE-8011/WADE-8012 User’s Manual
3-6
3.4
Clear CMOS Operation
The following table indicates how to enable/disable Clear CMOS Function hardware
circuit by putting jumpers at proper position.
JP1: CMOS Clear
JP1
Function
1-2 Short
Normal Operation
Ì
2-3 Short
Clear CMOS Contents
3.5
WDT Function
The Watchdog Timer of motherboard consists of 8-bit programmable time-out
counter and a control and status register.
WDT Controller Register
There are two PNP I/O port addresses that can be used to configure WDT.
2Eh: EFIR (Extended Function Index Register, for identifying CR index number)
2Fh: EFDR (Extended Function Data Register, for accessing desired CR)
WDT Control Mode Register
The working algorithm of the WDT function can be simply described as a counting
process. The Time-Out Interval can be set through software programming. The
availability of the time-out interval settings by software or hardware varies from
boards to boards.
