Hardware Configuration
NANO-5050 User’s Manual
2-3
J8 reserve
USB
J9 reserve
USB
J10
8 bits GPIO
J11
LPC debug port
J12 Serial
Port
J13
+12V DC source
J14 reserve
J15 Mini
PCIe
J16
Rear side FAN
J17 SATA
power
J18 LVDS
pane
J19 LED/Switch
J20 SATA
J21 SM
Bus
J22 Coin
battery
J23
Panel back light
J24 PCIe
x1
J25
CF-SATA (button side)
JP1
Clean RTC(Default 1-2)
JP2
LVDS Power Level (Default 1-2)
JP3
LVDS Back-light enable level high/low (Default 1-2)
Pin Assignments of Connectors
J1 : reserve for +12V DC adapter
PIN No.
Signal Description
1 12V
2 GND
3 GND
J2 : Line Out
PIN No.
Signal Description
1 GND
2
Line Out L
3 GND
4 Jack
Detect
5
Line Out R