Biases
&
References
TTL Input
Buffer
Startup
Protection
Logic
OC
Detect
Thermal
VDDok
RINP
RINN
VAROUTR
Ramp
Generator
COSC
ROSC
VCCok
5V LDO
AVCC
AVDD
AVDD
VDD
Deglitch &
Modulation
Logic
Gain
Adj.
Rfdbk2
Rfdbk2
Cint2
Cint2
Gain
Control
Deglitch &
Modulation
Logic
Gain
Adj.
Rfdbk2
Rfdbk2
Cint2
Cint2
LINP
LINN
VAROUTL
Gate
Drive
VClamp
Gen
Gate
Drive
PVCC
BSRP
PVCCR(2)
ROUTP(2)
PGNDR
PGNDR
ROUTN(2 )
PVCCR(2)
BSRN
Gate
Drive
VClamp
Gen
Gate
Drive
PVCC
BSLP
PVCCL(2)
LOUTP(2)
PGNDL
PGNDL
LOUTN(2)
PVCCL(2)
BSLN
VCLAMPL
VCLAMPR
VOLUME
VARDIFF
VARMAX
To Gain Adj.
Blocks
SD
VREF
REFGND
V2P5
V2P5
V2P5
Mode
Control
MODE
MODE_OUT
AVCC
AGND
AVDDREF
Gain
Adj.
Gain
Adj.
V2P5
V2P5
V2P5
V2P5
TPA3002D2
1
5
3.TPA3002D2
Sound power amplification TPA3002D2:(power amplification of stereo category D with volume
control)
TPA3002D2 is a high efficiency audio frequency amplifier of category D. The gains scope provided
is -40dB to -36dB. Supply voltage is 12V. The input of the amplifier is differential input (any noise at
the two input sides of the channel can be eliminated). The modulation of TPA3002D2 for various
outputs is from 0 to the supply voltage. However out P (positive output) and out N (negative output)
are now at the phase where they have no input to each other. For positive output voltage, the duty
cycle of OUT P is bigger than 50% and that for OUT N is less than 50%. For negative input voltage,
the duty cycle of OUT P is lower than 50% and that for OUT N is higher than 50%. In most of the
period the voltage to the load is 0V, which greatly reduces the switching current thus lowering the
power consumption of the load.
For BTL output (differential output), the voltage at the two output pins is 180 degree out of phase.
Load is connected between the two pins, thus enabling the load to get four times the output power
and reducing the baffle to the DC capacitor (BTL output is equal to balanced output).
