PNI Sensor Corporation
DOC#1017814 r01
V2Xe User Manual
– May 2012
Page 5
4
Set-Up
4.1
Electrical Connections
The V2Xe incorporates two 7-pin SIP connectors. The pin-out is given below in Table 4-1,
where pin #1 and pin #14 are defined in the mechanical drawing (Figure 3-1).
Table 4-1: Pin Descriptions
Pin #
Pin Name Description
1
SCLK
Serial Clock input for SPI port
2
MISO
Master In, Slave Out for the Module SPI port
3
MOSI
Master Out, Slave In for the Module SPI port
4
SSN
Slave Select for the
V2Xe’s SPI port. SSN must remain low until the
command response is clocked out.
5
GIO4
Reserved I/O. Do not connect.
6
SYNC
The SYNC line is not needed except in cases where the V2Xe gets out of
synchronization with the host. Synchronization issues primarily occur
during power-up when I/O and hardware are initialized. This may cause
glitches in the clock line, which can be interpreted by the V2Xe as clock
cycles. A rising edge on the V2Xe SYNC line resets
the V2Xe’s SPI and
communication buffers. The SYNC line is asynchronous with respect to
the SPI, so proper care in its implementation is mandatory. Contact PNI if
you are experiencing synchronization issues.
7
GND
Ground
8
GIO0
Reserved I/O. Do not connect.
9
GIO1
Reserved I/O. Do not connect.
10
GIO2
Reserved I/O. Do not connect.
11
GIO3
Reserved I/O. Do not connect.
12
V
DD
3V regulated supply voltage
13
---
Not connected
14
GND
Ground
After making the electrical connections, it is a good idea to perform some simple tests to
ensure the V2Xe is working as expected. See Section 5 for how to operate the V2Xe using
the V2Xe binary protocol.
