PLDA XpressGX5LP-SE, Справочное руководство

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XpressGX5LP-SE Reference Manual Ch.2 XpressGX5LP-SE Architecture
2.3 Board Features
The following table describes XpressGX5LP-SE board features:
Table 1: Board features description
Feature
name
Description
For more
information,
see ...
x8 PCI Express 3.0 male
connector
This connector supports PCI Express at 2.5, 5.0, and 8.0 Gbps for x8, x4, and x1
link width. PCI Express is provided via FPGA transceivers. Section 3.4
Dual SFP+ interfaces Two independent SFP+ interfaces using two GxB on the FPGA to enable two 1/
10 (or other data rate) links. Section 3.7
QDR2+ SRAM Two independant QDR2+ SRAMchips are available, which feature: Section 3.5
DDR3 SDRAM Two independent banks of DDR3L-SDRAM are available. Each bank consists of
9 x 4
Gb (8-bit wide) chips, which feature:
Section 3.6
Extension serial link The extension serial link uses four Rx/Tx Gigabit links to enable board-to-board
data transfer of up to 40
Gbps. This link also provides ten other LVCMOS signals.
--
Board configuration
module
A 32-bit configuration module (40MHz) is available to configure the FPGA at each
board power-up.
This module consists of two 2-Gbit Numonyx Flash Devices and an Altera MAX V
The Flash devices can be programmed using PLDA’s FlashPCI software. Each
device is directly connected to the FPGA and the CPLD pins.
Section 3.2
JTAG connector A mini JTAG connector is available on the board. You must use the extender
provided by PLDA to configure the FPGA via JTAG, using an Altera USB-Blaster
and Quartus.
Max V Board Manager The on board MAX V CPLD manages FPGA configuration, as well as IP
protection, CvP, partial reconfiguration and power/temperature management.
Reset button
1 local power-on reset button on the component side of the board. Section 3.10
Switches 3 micro switches on the component side. Section 3.11
Tri-color LEDs Two dual tri-color LEDs are available on the board bracket and can be used to
display information about the SFP+ connectors or user-defined information. Section 3.8
LEDs 8 user LEDs are available on the component side of the board. Section 3.9
EEPROMs Two 256k-bit Serial FlashPROMs are available for data storage via two I²C links Section 3.12
Power supply Power is provided via a daughter card supplied by the PCIe slot (12/3.3 V). Section 3.13
•
144Mbit density
•
18-bit data path
•
separate IO
•
400MHz clock Frequency
•
Up to 8 Gbytes density (4 Gbytes are mounted by default)
•
72-bit data path
•
Up to 800 MHz clock frequency
•
Maximum throughput of 12.8 Gbytes per bank