PDP-5071PU
126
1
2
3
4
1
2
3
4
C
D
F
A
B
E
DELAY ADJUSTMENT OF THE CONTROL SIGNAL (SUS-D)
1
Measure the pulse width of the SUS-D signal.
2
Check the pulse width of the SUS-D input signal for the DK module.
Adjust the variable control so that the pulse width of the SUS-D input signal for the DK module becomes the "pulse width of
the SUS-D signal
±
5 nsec."
Note: For details on measuring points of waveform, see the figure below.
50 % of the crest value
50 % of the crest value
50 % of the crest value
50 % of the crest value
SUS-D pulse width: Tsus-Dg
Adjust so that "Tsus-Dg = Tsus-D
±
5 nsec," using the variable
control shown in the table below:
SUS-D signal (input to the DRIVE Assy)
SUS-D signal (input to the DK module)
SUS-D pulse width
Tsus-D
SUS-D pulse width
Tsus-Dg
Assy
VR
Y MAIN DRIVE
VR2002
Содержание PDP-5070PU
Страница 20: ...PDP 5071PU 20 1 2 3 4 1 2 3 4 C D F A B E 2 6 PANEL CHASSIS SECTION 1 9 2 11 4 7 7 7 7 7 3 7 8 7 7 6 5 10 10 ...
Страница 43: ...PDP 5071PU 43 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 47: ...PDP 5071PU 47 5 6 7 8 5 6 7 8 C D F A B E REGULAR AWV2313 AWW1154 ELITE AWV2310 AWW1158 ...
Страница 57: ...PDP 5071PU 57 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 79: ...PDP 5071PU 79 5 6 7 8 5 6 7 8 C D F A B E 500ns div 500ns div 200ns div ...
Страница 200: ...PDP 5071PU 200 1 2 3 4 1 2 3 4 C D F A B E Block Diagram R2S11002AFT MAIN ASSY IC4701 AV SW ...
Страница 201: ...PDP 5071PU 201 5 6 7 8 5 6 7 8 C D F A B E Block Diagram R2S11001FT MAIN ASSY IC4901 Component SW IC ...