Pioneer MJ-HX2000, Руководство по обслуживанию

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X-HX5000, X-HX3000, X-HX2000
42
No.
Pin Name
I/O Function No.
Pin Name
I/O Function
1 BCLK O Bit clock output for SRDATA 31 TBAL O Tracking balance adjustment output
2 LRCK O
L, R discrimination signal output
H: Lch audio data , L: Rch audio data
32 FE I Focus error signal input (analog input)
3 SRDATA O Serial data output 33 TE I Tracking error signal input (analog input)
4 DVDD1 I Power supply for digital circuit 34 RFENV I RF envelope signal input (analog input)
5 DVSS1 I Ground for digital circuit 35 VDET I Vibration detection signal input (H: detection)
6 TX O Digital audio interface output signal 36 OFT I Off track signal input (H: Off track)
7 MCLK I
Microcomputer command clock signal input
(Data latches at rising edge.)
37 TRCRS I Track cross signal input
8 MDATA I Microcomputer command data input 38 /RFDET I RF detection signal input (L: detection)
9 MLD I
Microcomputer command load signal input L:
39 BDO I Drop out signal input (H: drop out)
10 SENSE O
Sense signal output (OFT, FESL, NACEND,
NAJEND, SFG, NWTEND)
40 LDON O Laser ON signal outputÅiH: ON)
11 /FLOCK O
Focus servo incoming signal (L:incoming
41 TES O Tracking error shunt signal output (H: shunt)
12 /TLOCK O
Tracking servo incoming signal (L:incoming
42 PLAY O Play signal output (H: PLAY)
13 BLKCK O Subcode block clock signal (fBLKCK=75Hz) 43 WVEL O Double speed status signal output
14 SQCK I External clock input for subcode Q register 44 ARF I RF signal input
15 SUBQ O Subcode Q data output 45 IREF I Reference current input
16 DMUTE I Muting output H:Mute 46 DRF I Bias pin for DSL
17 STAT O
Status signal (CRC, CUE, CLVS, TTSTOP,
FCLV, SQOK, FLAG6, SENSE, /FLOCK,
/TLOCK)
47 DSLF I/O Loop filter pin for DSL
18 /RST I
Reset input (Reset at IOSEL=L and more than
472ns) L:Reset
48 PLLF I/O Loop filter pin for PLL
19 SMCK O
When MSEL=H, 8.4672MHz clock signal
output
49 VCOF I/O Loop filter pin for VCO
20 PMCK O 88.2kHz clock signal output 50 AVDD2 I
Power supply for analog circuit
(for DSL, PLL, AD input and DA output)
21 TRV O Traverse forced forward output 51 AVSS2 I
GND for analog circuit
(for DSL, PLL, AD input and DA output)
22 TVD O Traverse drive output 52 EFM O
EFM signal output When IOSEL=H, EFM
signal output. When IOSEL=L,
23 PC O Spindle motor ON signal L: ON 53 PCK O PLL extract clock output (fPCK=4.32MHz)
24 ECM O
Spindle motor drive signal (forced mode
output) 3-state
54 TOFS O Tracking offset adjustment output
25 ECS O
Spindle motor drive signal
(servo error signal output)
55 SUBC O Subcode serial output
26 KICK O Kick pulse output 3-state 56 SBCK I
Clock input for subcode serial output
(with pull-up resistor)
27 TRD O Trscking drive output 57 VSS I GND for oscillation circuit
28 FOD O Focus drive output 58 X1 I
Crystal oscillation circuit input
(f=16.9344MHz, 33.8688MHz)
29 VREF I
Reference voltage for DA output section
(TVD, ECS, TRD, FOD, FBAL, TBAL, TOFS)
59 X2 O
Crystal oscillation circuit output
(f=16.9344MHz, 33.8688MHz)
30 FBAL O Focus balance adjustment output 60 VDD I Power supply for oscillation circuit
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Pin Function