BDP-HD1
18
1
2
3
4
1
2
3
4
C
D
F
A
B
E
3.4 MAIN ASSY 1/7
1/2
2/2
1/2
Large size
SCH diagram
Arrangement side B
Arrangement side A
DAC_MC
DAC
_
MUT
JTAG_TCK
JTAG_TRST#
JTAG_TDO
JTAG_TMS
U0_TXR
JTAG_TDI
U0_RXD
JTAG_TCK
JTAG_TDO
JTAG_TMS
JTAG_TRST#
JTAG_TDI
I2C_SCL
I2C_SDA
FIP_CLK
FIP_STB
IR
I2CS_SDA
I2CS_SCL
DAC_CS#
DAC_MDO
PB_INT
DAC_CS2#
FIP_DATA
9030_INT
PCI_CLK
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R 1 8 7 9
1 0 3
2
1
4
3
6
5
8
7
R 1 8 7 8
1 0 3
2
1
4
3
6
5
8
7
R1066
103
R1067
103
4
3
6
5
JTAG_RESET#
V_MUTE
R 1 8 5 2
1 0 3
R 1 8 5 1
N M
R1001
0R0
R1002
0R0
R1031
0R0
R1876
330
R1873
330
R1875
330
R1872
330
R1877
103
R1871
330
R1874
330
R1062
330
R1061
330
R1064
330
R1063
330
R1057
330
R1058
330
R1901
0R0
R1902
NM
R1903
0R0
R1053
0R0
R1051
0R0
R 1 0 5 2
1 0 5
R1072
330
R1073
330
R1074
103
V+3D
V+3V
V+1R2D
V+3S
V+3VS
V+1R2S
V+3PLL
V+3USB
V+1R2PLL
V+3D
V+2R6D
V+2R6S
L1001
DTL1106-A
3
2
1
L1011
DTL1106-A
3
2
1
L1021
DTL1106-A
3
2
1
L1031
DTL1106-A
3
2
1
C 1 0 0 2
1 0 5
C 1 0 1 2
1 0 5
C 1 0 2 2
1 0 5
C 1 0 3 2
1 0 5
C 1 0 0 6
1 0 6
C 1 0 0 7
1 0 6
C 1 0 0 5
1 0 6
C 1 0 3 5
1 0 6
C 1 0 3 6
1 0 6
C 1 0 2 4
1 0 6
C 1 0 1 4
1 0 6
C1115
104
C1116
104
C1131
105
C1871
105
C 1 0 0 3
1 0 2
C 1 0 1 3
1 0 2
C 1 0 2 3
1 0 2
C 1 0 3 3
1 0 2
C1103
VCG1063-A
C1071
NM
VKN1415
CN1871
1
2
3
4
5
6
7
8
9
10
11
X 1 0 0 1
X 1 0 0 2
2 2 1 / 4
C 1 0 0 1
2 2 1 / 4
C 1 0 0 4
2 2 1 / 4
C 1 0 1 1
2 2 1 / 4
C 1 0 2 1
2 2 1 / 4
C 1 0 3 1
2 2 1 / 4
C 1 0 3 4
XMMUTE
A1
NCA1
A2
VI1_P0
A3
VI1_CLK
A4
VI1_VS
A5
GPIO0
A6
RCLK1_XTAL_OUT
A7
RCLK1_XTAL_IN
A8
RESET#
A9
XTAL_OUT
A10
XTAL_IN
A11
UART1_TX
A12
UART1_RX
A13
UART0_TX
A14
UART0_RX
B1
VI1_P4
B2
VI1_P1
B3
VI1_HS
B4
VI1_VLD
B5
GPIO1
B6
GPIO7
B7
GPIO12
B8
RCLK0_IN
B9
XTAL_BUF
B10
UART1_RTS
B11
UART1_DSR
B12
UART0_DCD
B13
UART0_RTS
B14
UART0_CTS
C1
VI1_P5
C2
VI1_P6
C3
VI1_P2
C4
VI1_P3
C5
GPIO2
C6
GPIO8
C7
GPIO13
C8
VCXO1_IN
C9
VCXO0_IN
C10
UART1_DTR
C11
UART1_DCD
C12
UART1_CTS
C13
UART0_DTR
C14
UART0_DSR
D1
VI0_P1
D2
VI0_P0
D3
VI1_P7
D4
GPIO4
D5
GPIO3
D6
GPIO9
D7
GPIO14
D8
RCLK0_OUT
D9
RCLK1_OUT
D10
RCLK2_OUT
D11
JTAG_UART#
D12
VDD_PLL0_1V2
D13
VDD_PLL1_3V3
D14
VDD_PLL2_3V3
E1
VI0_P4
E2
VI0_P3
E3
VI0_P2
E4
GPIO5
E5
GPIO6
E6
GPIO10
E7
GPIO15
E8
GPIO11
E9
RCLK3_OUT
E10
TEST
E11
XTAL_DISC
E12
VSS_PLL0
E13
VSS_PLL1
E14
VSS_PLL2
F1
VI0_P9
F2
VI0_P8
F3
VI0_P7
F4
VI0_P6
F5
VI0_P5
F6
VSSF6
F7
VDD_3V3F7
F8
VSSF8
F9
VDD_3V3F9
F10
VDD_3V3F10
F11
VSSF11
F12
VSSF12
F13
VDD_3V3F13
F14
VDD_3V3F14
G1
VI0_P14
G2
VI0_P13
G3
VI0_P12
G4
VI0_P11
G5
VI0_P10
G6
VDD_3V3G6
G7
VSSG7
G8
VDD_1V2G8
G9
VSSG9
G10
VSSG10
G11
VDD_1V2G11
G12
VDD_1V2G12
G13
VSSG13
G14
VSSG14
H1
VI0_P19
H2
VI0_P18
H3
VI0_P17
H4
VI0_P16
H5
VI0_P15
H6
VSSH6
H7
VDD_1V2H7
J1
VI0_VS
J2
VI0_HS
J3
VI0_P22
J4
VI0_P21
J5
VI0_P20
J6
VDD_3V3J6
J7
VSSJ7
CLK25M
RESET#
R1081
330
R1082
330
R1083
330
R1084
330
R1076
103
R1077
103
R1087
103
R1086
103
R1085
103
R1055
NM
GND
C 1 0 2 5
C 1 0 1 5
C1877
NM
C1872
NM
C1873
NM
C1874
NM
C1875
NM
C1876
NM
R 1 0 5 4
1 0 5
C1051
120
C1052
100
R1078
NM
R1070
0R0
R1089
NM
C 1 0 0 8
C 1 0 3 7
R1071
10
R1075
10
27MHz
24MHz
for checker mode
V+3S
V+3S
V+3S
VSS1205
NM
NM
NM
R1088
0R0
C1081
NM
R1050
0R0
R1079
NM
VCH1266-A
VCH1266-A
for PBI_INTC
A
1/7
MAIN ASSY(VWV2234)
JTAG,EJTAG IN
1
Содержание Elite BDP-HD1
Страница 7: ...BDP HD1 7 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 43: ...BDP HD1 43 5 6 7 8 5 6 7 8 C D F A B E CN205 CN204 CN203 CN201 CN202 G CN4001 F 7 7 CN6051 A 7 7 CN6002 A ...
Страница 72: ...BDP HD1 72 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 78: ...BDP HD1 78 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 89: ...BDP HD1 89 5 6 7 8 5 6 7 8 C D F A B E Pin Function ...
Страница 90: ...BDP HD1 90 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 91: ...BDP HD1 91 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 92: ...BDP HD1 92 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 100: ...BDP HD1 100 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 101: ...BDP HD1 101 5 6 7 8 5 6 7 8 C D F A B E HOST INTERFACE USB 2 0 Pin Function ...
Страница 103: ...BDP HD1 103 5 6 7 8 5 6 7 8 C D F A B E HOST INTERFACE PBI Pin Function HOST INTERFACE PBI Control Pin Function ...
Страница 104: ...BDP HD1 104 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 108: ...BDP HD1 108 1 2 3 4 1 2 3 4 C D F A B E VIDEO PROCESSING SUBSYSTEM Digital Video Input 1 Pin Function ...
Страница 111: ...BDP HD1 111 5 6 7 8 5 6 7 8 C D F A B E VIDEO PROCESSING SUBSYSTEM HDMI Pin Function ...
Страница 113: ...BDP HD1 113 5 6 7 8 5 6 7 8 C D F A B E AUDIO PROCESSING SUBSYSTEM Audio Output Interface Pin Function ...
Страница 115: ...BDP HD1 115 5 6 7 8 5 6 7 8 C D F A B E SHARED PINS Uart Pin Function ...
Страница 116: ...BDP HD1 116 1 2 3 4 1 2 3 4 C D F A B E SHARED PINS GPIO Pin Function ...
Страница 117: ...BDP HD1 117 5 6 7 8 5 6 7 8 C D F A B E SHARED PINS Ethernet Pin Function MISCELLANEOUS PINS Miscellaneous Pin Function ...
Страница 118: ...BDP HD1 118 1 2 3 4 1 2 3 4 C D F A B E LISTING OF GROUND PINS VSS Ground Pin Function ...
Страница 119: ...BDP HD1 119 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 120: ...BDP HD1 120 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 121: ...BDP HD1 121 5 6 7 8 5 6 7 8 C D F A B E VOLT POWER RAIL 1 2V Power Rail VDD_1V2 Pin Function ...
Страница 123: ...BDP HD1 123 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 124: ...BDP HD1 124 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 125: ...BDP HD1 125 5 6 7 8 5 6 7 8 C D F A B E ...
Страница 126: ...BDP HD1 126 1 2 3 4 1 2 3 4 C D F A B E ...
Страница 127: ...BDP HD1 127 5 6 7 8 5 6 7 8 C D F A B E ...