EFX-1000
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7.1.3 POWER ON SEQUENCE
Power ON
CPU I/O port setting
Initialization of the RAM
Starting the DMA controller for controlling the LEDs
Setting of the event-timer interrupt (250
µ
sec)
Waiting for 30 msec by the hardware timer
Resetting and initial setting of the SRC and DAC
Resetting the DSP and loading the program
Reading the stored data from the EEPROM
Reading and setting of key statuses, etc.
Judging whether either Test mode or Debug mode was invoked
To the main process
Waiting until the completion status is indicated
by the DSP
POWER ON
Содержание EFX-1000
Страница 25: ...EFX 1000 25 5 6 7 8 5 6 7 8 C D F A B E CN405 2 3 A A 3 3 2 3 A 2 3 A 2 3 A 2 3 A 1 3 A DS_SRC SRC_DS ...
Страница 29: ...EFX 1000 29 5 6 7 8 5 6 7 8 C D F A B E B 2 2 1 2 B 1 2 B 1 2 B 1 2 B 1 2 B 1 2 B ...
Страница 30: ...EFX 1000 30 1 2 3 4 1 2 3 4 C D F A B E 3 8 7SEG ASSY 7SEG ASSY DWG1584 E E 2 2 CN715 B ...
Страница 31: ...EFX 1000 31 5 6 7 8 5 6 7 8 C D F A B E CN601 E ...
Страница 71: ...EFX 1000 71 5 6 7 8 5 6 7 8 C D F A B E 6 ADJUSTMENT There is no information to be shown in this chapter ...