Pioneer EFX-1000, Руководство по обслуживанию

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EFX-1000
74
1 2 3 4
1 2 3 4
C
D
F
A
B
E
E A r Number of DSP reception errors (from ADC [analog input])
E A t Number of DSP transmission errors (to DAC [analog output])
E d r Number of DSP reception errors (from SRC for input [digital input])
E d t Number of DSP transmission errors (to SRC for output [digital output])
No. of DSP starting sequences ("1000" displayed for normal startup)
0000: Starting Reset Vector (SP setting), initialization of GPIO
0010: Initialization of the Chip Support LIB
0020: Invalidation of interrupt (Global INT)
0030: Software-version setting completed
0040: Device-configuration setting completed
0050: Initialization of global interrupt (Disable & Req clear)
0060: PLL (CPU CLK/SDRAM/serial) setting completed
0070: Initialization of cache configuration completed
0080: External Memory IF (EMIF) setting completed
0090: First-half process of McASP (transmission/reception-SRC serial communication) initialization completed
S t S 00A0: First-half process of McBSP (ADC/DAC-serial communication) initialization completed
00B0: Initialization of DMA (settings for EDMA/QDMA, DMA interlocked with serial communication) completed
00C0: Initialization of timer interrupt completed
00D0: Validation of interrupt (Global INT)
00E0: Second-half process of McASP (transmission/reception-SRC serial communication) initialization completed
00F0: Second-half process of McBSP (ADC/DAC-serial communication) initialization completed
0100: Initialization of the Host Port Interface completed
0110: No process
0200: Initialization of the DSP Device completed (return from the initialization function to the main function)
0210: No process (for evaluation board)
0220: Initialization of RAM on the Beat Effect side completed
0230: Initialization of RAM on the Jog Break side completed
1000: Notification of completion of initialization to the main CPU (completion of the initialization sequence)
A / D Number of switching A/D inputs
Destination of the audio input (Rhythm TAP indication: "0" = analog, "1" = digital)
d - 1 DSP detection counter (High band for auto BPM) (1 count = 100
µ
s)
d - 2 DSP detection counter (Middle band for auto BPM) (1 count = 100
µ
s)
d - 3 DSP detection counter (Low band for auto BPM) (1 count = 100
µ
s)
d - 4 Counter for DSP debugging
d - 5 Counter for DSP debugging
S r 1 Interrupt 1 register for SRC for input (07h)
S r 2 Receive-error register for SRC for input (10h)
S r 3 Sampling-rate register for SRC for input (1eh)
S r 4 Error accumulation counter for SRC for input
S r 5 Number of unlock recoveries for SRC for input
S r 6 Number of parity errors for SRC for input
E r 1 General-purpose counter for debugging (MIDI serial errors)
E r 2 General-purpose counter for debugging (illegal commands received by MIDI)
E r 3 General-purpose counter for debugging (illegal data received by MIDI)
E r 4 General-purpose counter for debugging (buffer overflow received by MIDI)
E r 5 General-purpose counter for debugging (buffer overflow transmitted by MIDI)
E r 6 General-purpose counter for debugging (overflow of the DSP write buffer)
0ch DSP SDRAM check (Normal: "0000
→
increase of the count
→
0100", abnormal: "FFFF")
BPM COUNTER display Check items