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30
DJM-900NXS
1
2
3
4
A
B
C
D
E
F
1
2
3
4
[2-2] No signal is input to the DIGITAL connector.
8
Loose connection
/defective parts
Loose connection
/defective parts
Loose connection
/defective parts
Loose connection
/defective parts
Loose connection
/defective parts
Loose connection
/defective parts
Loose connection
/defective parts
Loose connection
/defective parts
Loose connection
/defective parts
I
N
PUT Assy/
MAI
N
Assy
LI
N
E_SEL*
Representative
LI
N
E_SEL1
[Checking the RELAY block]
Check for the LI
N
E_SEL* signal.
If the input selector is set to PHO
N
O,
the LI
N
E_SEL* signal level is H.
If the input selector is set to CD/LI
N
E,
the LI
N
E_SEL* signal level is L.
• If a LI
N
E_SEL* signal is not output properly,
check for loose connection with the MAI
N
Assy,
improper part mounting status for communication,
or improper mounting of the MAI
N
CPU.
If there is no problem, the MAI
N
CPU (IC2011)
may be defective. Replace it.
• If a LI
N
E_SEL* signal is output properly, this
block must be improperly soldered or defective.
10.41 WA
V
EFORMS
I
N
PUT ASSY
10.41 WA
V
EFORMS
I
N
PUT ASSY
10.41 WA
V
EFORMS
I
N
PUT ASSY
10.41 WA
V
EFORMS
MAI
N
ASSY
10.41 WA
V
EFORMS
MAI
N
ASSY
10.41 WA
V
EFORMS
MAI
N
ASSY
10.41 WA
V
EFORMS
I
N
PUT ASSY
10.41 WA
V
EFORMS
MAI
N
ASSY
10.41 WA
V
EFORMS
MAI
N
ASSY
9
I
N
PUT Assy
IC4009/IC4010
2 pin, 4 pin
Representative
RESET_I
N
RESET_I
N
1
[Checking the RESET signal path]
Check for the RESET signal.
• If the signal level at Pin 2 is H and that at Pin 4 is
L, IC4009/IC4010 must be soldered impropely or
defective.
• If the signal level at Pin 2 is L, go to [10].
10
I
N
PUT Assy
IC4005 2 pin, 3 pin
AD/DA_RESET
BCLK
[Checking the RESET signal path]
Check for the RESET signal.
• If the signal level at Pin 2 is L, go to [12].
• If the signal level at Pin 3 is not normal, check for
BCLK in [13].
• If the signal level at Pin 2 is H and that at Pin 3 is
normal, IC4005 is soldered improperly or defective.
11
I
N
PUT Assy
LRCLK: IC4002/IC4006
BCLK: IC4003/IC4007
MCLK: IC4004/IC4008
2 pin, 4 pin
Representative
LRCLK_I
N
_2
LRCLK
BCLK_I
N
_2
BCLK
MCLK_I
N
_2
MCLK
[Checking the CLK signal path]
Check for the LRCLK, BCLK, and MCLK
signals.
• If the signal level at Pin 2 is normal and Pin 4 has
no signal, IC4002/IC4006/IC4003/IC4007/IC4004
10.41 WA
V
EFORMS
I
N
PUT ASSY
/IC4008 must be improperly soldered or defective.
• If the signal at Pin 2 is not normal, go to [13].
12
MAI
N
Assy
R709
[Checking the RESET signal path]
Check for the RESET signal.
If no problem is found, ETHER UCOM (IC501)
must be improperly soldered or defective.
13
MAI
N
Assy
LRCLK: IC2206 2,4 pin
BCLK: IC2209 2,4 pin
MCLK: IC2210 2,4 pin
[Checking the CLK signal path]
Check for the LRCLK, BCLK, and MCLK
signals.
• If the signal at Pin 2 is normal and Pin 4 has no
signal, IC2206/IC2209/IC2210 must be improperly
soldered or defective.
• If the signal at Pin 2 is not normal, FPGA (IC2214)
must be improperly soldered or defective.
No.
Cause
Diagnostics Point
Item to be Checked
Corrective Action
Reference
Prior
Confirmation
DIGITAL, CD/LI
N
E,
PHO
N
O, LI
N
E, USB
*/* selector/TRIM
Confirm on the screen that the selector
is set properly.
1
MAI
N
Assy
IC101(CH1)
IC201(CH2)
IC301(CH3)
IC401(CH4) -5 pin
Representative
CH1_SPDIF
Check if a signal is input to DIGITAL
properly.
If any of the signals is not input, IC101(CH1)
/IC201(CH2)/IC301(CH3)/IC401(CH4) may be
defective.
2
MAI
N
Assy
IC110(CH1)
IC202(CH2)
IC302(CH3)
IC402(CH4) -21 pin
Representative
DIR_RESET
Check that the RESET signal level of the
DIR is High.
• If it is H, go to [3].
• If it is L and IC504 has no problem, ETHER
UCOM (IC501) must be improperly soldered or
defective.
3
MAI
N
Assy
IC110(CH1)
IC202(CH2)
IC302(CH3)
IC402(CH4)
• LRCKO: 10 pin
• BCKO: 11 pin
• SCKO: 4 pin
• DOUT: 12 pin
Representative
Check for the LRCKO, BCKO, SCKO,
DOUT signal output from DIR.
• If a signal is output, go to [4].
• If any of the signals is not output, IC110(CH1)
/IC202(CH2)/IC302(CH3)/IC402(CH4) may be
improperly soldered or defective.
No.
Cause
Diagnostics Point
Item to be Checked
Corrective Action
Reference
2-14
2-14
2-9
2-9
2-7
2-7
2-6
2-13
2-3
2-12
2-2
2-11
2-6 2-13 2-3
2-12 2-2 2-11
1-28
1-28
1-44 1-49
1-44 1-49
1-45 1-48
1-45 1-48
1-46 1-47
1-46 1-47
1-6
1-6
1-11
1-11
1-8
1-9
1-7 1-10
1-8
1-9
1-7 1-10
2-12
2-12
2-8
2-8
2-18 2-19
Содержание DJM-900NXS
Страница 10: ...10 DJM 900NXS 1 2 3 4 A B C D E F 1 2 3 4 2 2 PANEL FACILITIES ...
Страница 11: ...11 DJM 900NXS 5 6 7 8 5 6 7 8 A B C D E F ...
Страница 12: ...12 DJM 900NXS 1 2 3 4 A B C D E F 1 2 3 4 ...
Страница 15: ...15 DJM 900NXS 5 6 7 8 5 6 7 8 A B C D E F ...
Страница 20: ...20 DJM 900NXS 1 2 3 4 A B C D E F 1 2 3 4 4 3 DSP BLOCK DIAGRAM ...
Страница 21: ...21 DJM 900NXS 5 6 7 8 5 6 7 8 A B C D E F ...
Страница 87: ...87 DJM 900NXS 5 6 7 8 5 6 7 8 A B C D E F ...
Страница 189: ...189 DJM 900NXS 5 6 7 8 5 6 7 8 A B C D E F ...
Страница 192: ...192 DJM 900NXS 1 2 3 4 A B C D E F 1 2 3 4 A SIDE B A INPUT ASSY CN4003 CN4002 CN5001 CN5401 ...
Страница 193: ...193 DJM 900NXS 5 6 7 8 5 6 7 8 A B C D E F A SIDE B LF DWX3193 INPUT DWX DNP2625 B CN6201 CN4201 CN4601 1 ...