Pioneer DEH-P3950MP, Руководство по обслуживанию

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DEH-P3950MP/XU/ES
64
1 2 3 4
1 2 3 4
C
D
F
A
B
E
No. Symbol I/O Explain
1 ANT I Antenna Input Antenna input. 75
Ω
. Surge absorber is necessary.
Series circuit including an inductor and a resistor is connected with RF
ground for the countermeasure against the ham of power transmission line.
2 RFGND1 RF Ground Ground of R.F. block
3 RFGND2 RF Ground Ground of R.F. block
4 RFGND3 RF Ground Ground of R.F. block
5 RFGND4 RF Ground Ground of R.F. block
6 VCC Power Supply Power supply for Analog block. D.C 8.4 V
±
0.3 V
(performance isn't guaranteed besides 8.4 V)
7 SLIN I Signal Level Input Input signa level from BE_IC
8 IFOUTA
IFOUTB O
O IF Output IF signal output (F.E.output)
9 IF Output IF signal output (F.E.output)
10 DGND Digital Ground Ground of Digital. block
11 REFINA I
I
I
I
I
Reference Signal Input reference signal for PLL part with FE_IC
12 REFINB Reference Signal Input reference signal for PLL part with FE_IC
13 LDET Lock Detector PLL lock detecter output "High" active
14 VDD
O
Power Supply Power supply for Digital block. D.C 3.3 V
±
0.2 V
15 DI Data In
16 CK CK
17 CE1 Chip Enable-1 Chip enable for FE_IC "High" active
18 DO O Data Out Data output
19 CE2 O Chip Enable-2
20 SLOUT O Signal Level Output Output of FM/AM signals level (D.C.)
-
FM/AM Tuner Unit
Clock data input(not sending data in tuner reception operating in noise
being output)
Data input (not sending data in tuner reception operating in noise
being output)
Chip enable for EEPROM "Low" active. in power ON/OFF, please turn CE2
into "High" (= VDD).
ATT
ATT
TANK
ATT RF
LFP
LFP VCO
CF
IC1
MIX / IF / PLL
IC2
EEPROM
1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 19 20 11
ANT VCC SLIN IFOUT
A
IFOUTB DGND RFINA RFINB LDET VDD DI CK CE1 DO CE2 SLOUT RFGND1 RFGND2 RFGND3 RFGND4
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