IC Data Sheets
8.
8.2
Diagram B07, MST9A885GL-LF (IC U4201)
Figure 8-2 Pin configuration.
Pin 1
1
3
14
17
1
8
21
2
3
25
27
2
8
3
0
3
2
3
4
3
6
3
9
41
4
3
15
16
19
20
22
24
26
29
3
1
33
3
5
3
7
38
40
42
44
45
46
47
4
8
50
51
52
49
REXT
H
S
YNC1
V
S
YNC1
VCLAMP
REFP
REFM
BIN1P
RI N1P
BIN0P
GIN0P
RI N0P
AVDD_
33
H
S
YNC0
V
S
YNC2
S
OGI N1
GIN1P
VCOM2
VCOM
3
S
OGI N0
GND
V
S
YNC0
BIN2P
S
OGI N2
GIN2P
RI N2P
C1
Y1
C0
Y0
CVB
S3
CVB
S
2
CVB
S
1
VCOM1
AVDD_
33
CVB
S
OUT1
CVB
S
OUT0
GND
GPIOL[ 0]
GPIOL[ 1]
GPIOL[ 4]
XOUT
AVDD_MPLL
GND_VI FPLL
VR27
VR12
1
2
3
4
5
7
9
11
6
8
10
12
5
3
54
55
56
57
59
61
6
3
5
8
60
62
64
GND_RX
S
S
I FP
S
I FM
VI FM
VI FP
AVDD_RXV
TAFC
AVDD_TAGC
GND_TAGC
TAGC
AVDD_AU
77
7
8
8
1
8
2
8
5
8
7
8
9
91
92
94
96
9
8
100
10
3
105
107
79
8
0
83
8
4
8
6
88
90
9
3
95
97
99
101
102
104
106
10
8
109
110
111
112
114
115
116
11
3
AU
V
A
G
AVD
D
_
A
U
LI
N
E
_
IN
_
0
L
L
INE
_
IN_0R
L
INE_IN_1L
L
INE
_
IN_1R
AU
C
O
M
LI
N
E
_
IN
_
3
L
L
INE
_IN_M
O
NO
LI
N
E
_
O
UT
_
3
R
L
INE_OU
T
_2R
L
INE_OU
T
_1R
L
INE_OU
T
_0R
GPIO
D
[0]
L
INE_IN_2L
L
INE
_
IN_2R
L
INE
_
IN_
3
R
LI
N
E
_
O
U
T
_
3
L
LI
N
E
_
O
U
T
_
2
L
L
INE
_O
U
T
_1L
L
INE
_O
U
T
_0L
GPIO
D
[1]
GPIO
D
[2]
GND
VD
D
C
WR
Z
RD
Z
AL
E
BA
D
R
[1
]
BA
D
R
[0
]
RA
S
Z
V
DDC
GN
D
AV
DD_M
I
CA
S
Z
WE
Z
MA
D
R
[1
1
]
MAD
R
[1
0
]
65
66
67
6
8
69
71
7
3
75
70
72
74
76
117
11
8
119
120
121
12
3
125
127
122
124
126
12
8
MA
D
R
[9
]
MA
D
R
[
8
]
MA
D
R
[7
]
MA
D
R
[6
]
MA
D
R
[5
]
MA
D
R
[4
]
MA
D
R
[1
]
MA
D
R
[
3
]
MA
D
R
[2
]
MA
D
R
[0
]
1
8
0
179
176
175
172
170
16
8
166
165
16
3
161
159
157
154
152
150
17
8
177
174
17
3
171
169
167
164
162
160
15
8
156
155
15
3
151
149
14
8
147
146
145
14
3
142
141
144
192
191
190
1
8
9
1
88
1
8
6
1
8
4
1
8
2
1
8
7
1
8
5
1
83
1
8
1
140
1
3
9
1
38
1
3
7
1
3
6
1
3
4
1
3
2
1
3
0
1
3
5
1
33
1
3
1
129
24
4
24
3
24
0
2
3
9
2
3
6
2
3
4
2
3
2
2
3
0
22
9
22
7
22
5
22
3
22
1
21
8
21
6
21
4
24
2
24
1
2
38
2
3
7
2
3
5
2
33
2
3
1
22
8
22
6
22
4
22
2
22
0
21
9
21
7
21
5
21
3
21
2
21
1
21
0
20
9
20
7
20
6
20
5
20
8
DDC
D
_
S
CL
DDC
D
_
S
DA
HP
LU
G
RX2P
RX2N
GND
RX0P
RX0N
AVD
D
_
33
25
6
25
5
25
4
25
3
25
2
25
0
24
8
24
6
25
1
24
9
24
7
24
5
20
4
20
3
20
2
20
1
20
0
19
8
19
6
19
4
19
9
19
7
19
5
19
3
A
UVR
P
AVDD_RX
S
GND
GN
D
DI
[7]
DI
[6]
DI
[5]
DI
[4]
VD
DP
DI
[
3
]
DI
[2]
DI
[1]
DI
[0]
VD
DP
PWM
2
PWM
3
RXC
K
N
RXC
K
P
RX1N
VD
DC
IC
L
K
GPI
O
T[
0]
AUVR
M
GN
D
CVB
S
0
VCOM0
AV
DD_
M
I
PWM0
S
AR2
S
AR0
GND
S
PI_
S
CZ
S
PI_
S
CK
GND
S
AR
3
S
AR1
VDDC
S
PI_
S
DO
S
PI_
S
DI
U
S
B20_DM
AVDD_U
S
B
U
S
B20_REXT
MVREF
MCLKE
MCLK
MCLKZ
DQM1
DQ
S
1
MDATA[ 15]
MDATA[ 11]
MDATA[ 10]
AVDD_MI
MDATA[
3
]
MDATA[ 2]
GND
MDATA[ 1]
MDATA[ 0]
AVDD_MI
DQ
S
0
DQM0
I NT
DDCA_
S
CL
DDCA_
S
DA
DDCR_
S
CL
DDCR_
S
DA
PWM1
GPIOR[0]
GPIO
D
[
3
]
GPIO
D
[5]
GPIO
D
[7
]
GPIO
D
[4]
GPIO
D
[6
]
VDD
P
AV
DD
_
M
IP
LL
GND_RXV
GND
U
S
B20_DP
VDDP
GND
I RIN
VDDP
U
S
B_DM
U
S
B_VBU
S
U
S
B_DP
U
S
B_CID
GPIOB[ 0]
GPIOB[ 1]
RX1P
GND
XIN
MDATA[ 9]
MDATA[
8
]
AVDD_MI
MDATA[ 7]
MDATA[ 6]
MDATA[ 5]
MDATA[ 4]
MDATA[ 14]
MDATA[ 1
3
]
MDATA[ 12]
AVDD_MI
GPIOL[ 2]
GPIOL[
3
]
AD[0
]
AD[1
]
AD[2
]
AD[
3
]
GN
D
VDD
P
LV
B
0
M
LV
B
0
P
LV
B
1
M
LV
B
1
P
LV
B
2
M
LV
B
2
P
LV
B
C
K
M
LV
B
C
K
P
LV
B
3
M
LV
B
3
P
AVDD_MI
GND
VD
DP
LV
A0
M
LV
A0
P
LV
A1
M
LV
A1
P
LV
A2
M
LV
A2
P
LV
ACK
M
LV
ACK
P
LV
A
3
M
LV
A
3
P
VD
DC
GND
HW
RE
S
ET
GPIO
E
[2]
GPIO
E
[0]
GPIO
E
[1]
GPIO
E
[
3
]
NC
NC
NC
NC
M
S
T9A
88
5 GL
XXXXXXXX
XXXXX
1
8
250_
3
01_090210.ep
s
090210
Pin Confi
g
uration