Philips Q548.1E, Руководство по обслуживанию

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Circuit Descriptions EN 42 Q548.1E LA 7.
2009-Apr-03
7.4 Front-End
The Front-End consist of the following key components:
• Tuner HD1816AF
• IF demodulator DRX3926K
• AGC amplifier UPC3221GV
• SAW filter 36M125.
Below find a block diagram of the front-end application.
Figure 7-6 Front-End block diagram
The DRX3926K is a multi-standard demodulator supporting
DVB-C, DVB-T and analogue standards. The demodulated
digital stream is fed into the parallel transport stream data ports
of the PNX8543. The demodulated analogue signal in the form
of CVBS is connected to the analogue video CVBS/Y input
channel, while the SIF is connected via the SSIF2 positive input
port.
7.5 HDMI
In this platform, the TDA9996 HDMI multiplexer is
implemented. The EDID contents are no longer stored in a
separate EEPROM, but directly in the multiplexer. Each input
has its own physical sub address: the first 253 bytes are
common, where the last 3 bytes define the specific input. The
EDID contents are, at +5V power-up, downloaded to RAM. The
following figures show the HDMI input configuration and EDID
control.
Figure 7-7 HDMI input configuration
Figure 7-8 EDID control (embedded EDID)
Some delta’s w.r.t. TDA9996 compared to earlier chassis/
platforms are:
•
+5V detection mechanism
• stable clock detection mechanism
• integrated EDID
• RT control
• HPD control
• TMDS output control
• CEC control
• new hot-plug control for PNX8543 for 5th HDMI input
• new EDID structure: EDID stored in TDA9996, therefore
there are no EDID pins on the SSB. Only in the event of a
5th HDMI input, an additional EEPROM is foreseen, as
was implemented in previous platforms.
Some delta’s with respect to PNX8543 compared to earlier
chassis/platforms are:
•
2 HDMI inputs (A & B)
• HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection.
After replacement of the TDA9996 HDMI multiplexer, the
default I
2
C address should be reprogrammed from C0 to CE,
and the HDMI EDIDs should be reprogrammed as well. Both
actions should be executed via ComPair.
1 8 440_211_090227.ep s
090227
I2C-TUNER
IF-AGC
NXP Hy b rid
T u ner
S AW
Filter
IF Amplifier DRX 3 926K PNX 8 54 3
I2C- SS B
CVB S
2nd S IF
T S
TDA9996
1P06 1P04 1P03 1P02
1P
0
5
H D M IA-R X
AR X
BR X
C R X
D R X
H D M IB-R X
PNX8543
D
C
A
B
Out
1M 96
A B
H D M I 2
H D M I Side
(optional)
H D M I 3
(optional)
H D M I 1
H D M I 4
(optional)
E did
1 8 440_21 3 _090227.ep s
090227
1 8 440_214_090227.ep s
090227
TDA 9996
CPU
IIC
P la tfo rm w ith e m b e d d e d E D ID
4 * H D M I
inputs
253 com m on B ytes
+ 1B subaddres of
S ource P hysical A ddress
+3 B for input A
+3 B for input B
+3 B for in put C
+3 B for in put D
E D ID : 253 B
3B 3B 3B 3B