Circuit-, IC descriptions and list of abbreviations
EN 149
LX7500R
9.
A_MUTE
Audio Mute
ABCK
Audio Bit Clock
AD (1:10)
Address bus lines for Host I/F of
Link+Codec IC7431
AEMP1
PCM1 emphasis ON/OFF for PCM1
output
AFS1
Audio sampling frequency indication
signal
ALRCLK
Audio Word Select
AMCLK44
11.2896MHz (=256 * 44.1 kHz) audio
master clock signal for 44.1 kHz audio
AMCLK48
12.288MHz (=256 * 48 kHz) audio
master clock signal for 32 kHz and 48
kHz audio
APWM
PWM signal for audio PLL
ASIC
Application Specific Integrated Circuit
BUFENn_AUD
Buffer Enable Audio
BUFENn_VID
Buffer Enable Video
CLK27M_CON
27MHz Clock to Digital Board
CS
Parallel interface chip select input of
Link+Codec IC7431
CTL (0:1)
Link interface control lines
CTSN
Clear to Send
D (0:15)
Flash data lines of Link+Codec
IC7431
DCDi
Directional Correlational
Deinterlacing. Circuitry that reduces
jaggies on diagonal edges when
deinterlacing video-sourced material.
DV_STATUS
Interrupt pin for reading DV-status
HS_CLK
Video clock input of Link+Codec
IC7431
INT
Interrupt request output of Link+Codec
IC7431 (input to Micro-Controller)
IOR
Parallel interface IO read control input
of Link+Codec IC7431
ISPN
In System Programming signal (used
for programming IC7802)
LKON
Link-on signal outputLPSLink power
status inputLREQLink request input
MA (0:10)
SDRAM address lines of Link+Codec
IC7431
MCAS
SDRAM column address strobe signal
MCLK
SDRAM clock signal
MD (0:15)
SDRAM data lines of Link+Codec
IC7431
MRAS
SDRAM row-address strobe signal
MWE
SDRAM write enable signal
PCM1
Audio Serial Data Output of
Link+Codec IC7431
PCM1_NEW
’MSB justified’ to I2S converted audio
serial data; audio serial data input of
audio DAC UDA1334A
PD (0:15)
Data bus lines for Host I/F of
Link+Codec IC7431
PHY_D (0:7)
Data bus connection between PHY
and LINK device
RESETn
DVIO board reset
RESET_FM
Reset signal driven by Flashmaster
programming device
RESTB
Reset input of Link+Codec IC7431
RTSN
Request to Send
RWZ
Parallel interface read/write control
input of Link+Codec IC7431
RXD
Receive Data
SCLK
Link control output clock
TXD
Transmit Data
VPP
+10V switchable programming voltage
of microcontroller
YUV (0:7)
Digital Video
Содержание LX7500R
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Страница 125: ...Circuit IC descriptions and list of abbreviations EN 125 LX7500R 9 9 3 5 Video routing Figure 9 1 Video IO Europe ...
Страница 129: ...Circuit IC descriptions and list of abbreviations EN 129 LX7500R 9 9 4 4 Video routing Figure 9 3 Video IO Nafta ...
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Страница 141: ...Circuit IC descriptions and list of abbreviations EN 141 LX7500R 9 IC7411 NJM2285 Analog Board Video Switch ...