11-22
11-22
Synthesiser and local oscillator
The internal circuitry of the TSA5060A can be seen in below
figure
The TSA5060A is software controlled by the I2C bus.
TV applications do send commands directly via the TV slow
bus while the audio applications have a small interface board
with an µP PIC12C508 to send the commands.
To verify whether there is communication between the host
device and the TSA 5060A one can check the supply voltage of
the osc.transistor 7103 (TP F113) and should be about 7.5 V in
normal conditions when the I2C signal is interpreted by the
synthesiser. If there is improper communication the voltage
remains at zero V.
There is version recognition foreseen to discriminate between
433-864 and 914 MHz units. This feature will automatically load
the correct frequency division words into the synthesiser at
starting up and initialisation of the host device (e.g. TV set).
The reference quartz is 4 MHz and is divided down to a lower
reference frequency of 25 or 50 kHz (depending on the
version). The PLL filter is passive and includes 2103 – 2104 –
3107. The transistor 7102 is part of the PLL current source and
allows connection to higher supply voltages as +5V.
The TSA5060A has some output ports that are used to:
•
Vosc (to switch the LO)
•
Vpil (to switch the pilot)
•
Port P1 to switch the PA
The oscillator (LO) is a common base transistor (7103) that is
oscillating at half the output frequency. The frequency is tuned
by the varicap 6102 until the tuning voltage is in the range of
the loop filter (between 1 and 6 Vdc). If the voltage is outside
this range then possibly the division ratio is chosen outside the
normal range or some freq. dependant component around the
transistor is faulty.
Multiplier and power amplifier
The LO signal is multiplied by two in a separate stage 7105 in
order to get a high isolation between the LO and the antenna.
There is quite some filtering necessary at the output because it
is necessary to suppress the half freq, and its harmonics from
reaching the PA stage. There is 2 stage bandstop filter
followed by an elliptic low pass filter. This filtering has to do
with the legal requirements for spurious radiation.
The PA stage with 7106 increases the power level to about +15
dBm at the output of the filter. The transistor is polarised into
class A for min. harmonic content and furthermore there is
output filtering available to further reduce the harmonics. The
configuration differs with the freq. version.
The 864 and 914 MHz versions for TV sets are using an
integrated antenna on the board while the 433 TV version and
all AV versions use a telescopic antenna. This results in different
matching networks between TX and antenna. The printed dipole
is driven symmetrically by a balun for optimum power transfer
and symmetry. There are protection diodes (6110 & 6111)
foreseen but not stuffed for ESD when applying to an external
antenna.
The audio compander circuit
The audio compander uses a SA572 (7112), which is intended
for high-end applications. It is to be used together with a low
noise opamp (7113). There is no audio input filtering ahead of
the compander. Therefore it can only be used when the source
is having no frequency components above 20 kHz otherwise the
compander linearity will be at risk. In the TV applications this is
realised with a digital filter at the MDM board while for the AV
applications there is additional low pass filtering to ensure good
operation.
Graphically the operation of a companding expanding system
can be understood from following figure:
The basic compander configuration is given above. From the
diagram one can understand the factor of 2 of companding as
follows:
There is a variable gain cell (variable resistor) in the feedback
loop of an opamp (NJM4565M). There is a rectifier cell that
detects the output voltage of the opamp and translates it into a
current send to the gain cell .The rectifier has an attack time
constant (C3) and a decay time constant (C4), which is
optimised to give the best auditive result.
If the input Vin rises with e.g. 4 times then the output can rise
only 2 times. This is because the feedback resistor formed by
the gain cell is decreased with a factor of 2.
Remember for an opamp Vout = Vin* ((Rf+R1)/R1) where R1
is constant. (Rf= R2+ internal gain cell res.)
The preemphasis, stereo coding and output filtering
The 2 channels available from the compander are now having
pre-emphasis with a time constant of 12 uS. Too much time
constant would give problems with the voltage rising too high at
maximum Modulation frequency and hence occupied band
width of the modulated signal. The pre-emphasis consist of a
simple RC circuit. The stereocoder 7111C is in fact just an
electronic switch, which is driven from the subcarrier frequency.
By this operation the spectrum at the output of the switch is as
follows in the frequency domain:
Figure 1-9 Synthesizer part of transmitter circuit diagram
Figure 1-10 Block diagram TSA5060A
Figure 1-11 Multiplier and power amplifier
Figure 1-12 Compander graphics
Figure 1-13 Compander circuit
Figure 1-14 Gain cell
Figure 1-15 Multiplex without pilot
Basically the circuit comes down to following simple circuit:
SYNTHESIZER
3114
15K
2198
220p
3107
2K2
4107
1K0
3103
PLVA2656A
6101
5132
BLM21
3113
6K8
5p6
2111
3112
100K
12n
5113
470R
3101
2201
100p
2107
1n0
3102
470R
2108
22p
10K
3111
BC847B
7102
1107
Hole 3.5 mm
1
2
100n
2114
5103
BLM21
3106
100R
6K8
3105
2115
220p
2118
1p
F113
3110
AT-51
1105
4M
330R
0001
frame
1
2
3
4
5
2116
15p
2113
6p8
7103
BFR92A
10u
2103
10n
2101
1n0
2106
2199
10u
220p
2122
100n
2104
4K7
3109
2K2
3108
3121
82R
P2
7
P3
13
RFA
14
RFB
6
SCL
5
SDA
12
VCC
2
XTAL
3
XT|COMP
330R
3119
TSA5060ATS
7101
11
ADC
4
AS
1
CP
16
DRIVE
15
GND
10
P0
9
P1
8
F112
F111
3115
150R
5101
100n
5108
12n5
470p
2109
1K0
F110
3104
18p
2102
15p
2117
6K8
3120
6102
BB151
470n
2110
220p
2197
3122
2K2
2120
1p8
3116
100R
220n
2105
I2C_data
I2C_clock
MPX
Vpil
Vosc
OSC
OSC
mon_ster
+8b
+5V
CL36532008_070.eps
290403
8n2
2127
3p9
5109
BFG520
7106
2121
220p
47p
2124
10K
3118
2185
22p
4101
5105
12n
2128
2p2
3125
68K
5116
8n2
2190
3p9
7105
BFG520
AERIAL BRACKET
0002
100R
3123
2205
47p
47p
2123
2p2
2131
2p2
2210
5n6
5118
8p2
2186
4104
6111
BAV99
BC857B
7104
6103
BZX384-C4V7
2188
3p3
2187
5p6
6n8
5104
F113
4102
5117
39n
2192
47p
5106
68n
4p7
2200
330R
5107
4n7
2207
3p9
0p68
2208
5129
8n2
8n2
5128
2206
3p9
2p7
2125
6p8
2130
3117
47K
3124
150R
2p7
2132
27n
F114
2193
47p
5120
F115
6K8
3120
2191
5p6
2189
3p9
6110
BAV99
2126
47p
33n
5121
1102
RT-01T
3122
2K2
8n2
5112
2p7
+8b
+8b
2129
Vosc
+8b
CL36532008_072.eps
290403
COMPRESSION
IN
EXPANDOR
OUT
REL LEVEL
ABS LEVEL
dB
dBM
3.0V
547.6MV
400MV
100MV
10MV
1MV
+29.54
+14.77
+12.0
0.0
–20
–40
–60
–80
+11.76
–3.00
–5.78
–17.78
–37.78
–57.78
–77.78
–97.78
VRMS
100 V
10 V
INPUT TO G
AND RECT
2
1
2
CL36532008_073.eps
290403
BUFFER
G
RECT
COMPANDER
10K
3159
1u
2143
NJM4565M
7113-A
3
2
1
8
4
3K3
3156
F140
100K
3142
4n7
2145
2141
470p
18K
3151
22n
2160
18K
3152
47K
3147
F143
18K
3150
2164
2u2
50V
GIB
8
GND
5
GOA
11
GOB
2 RCA
14 RCB
3 RIA
13 RIB
6
THTA
10
THTB
1
TRTA
15
TRTB
16
VCC
SA572D
7112
4 ACA
12 ACB
7 GIA
9
47K
3146
3145
15K
16V
47u
2139
2161
2u2
50V
2157
2u2
5
0V
2147
1u
10K
3158
22n
2159
16V
10u
2153
F144
F145
22p
2151
5
6
7
8
4 7113-B
NJM4565M
100K
3143
15K
3144
2154
10u
1
6V
22p
2152
82K
3148
1K0
3140
22n
2140
470p
2142
1K0
3154
3141
1K0
1u
2148
F141
16V
10u
2149
18K
3153
4n7
2146
2150
10u 16V
1K0
3155
2K2
3168
3167
2K2
F142
270p
2156
3157
3K3
50V 2u2
2162
1u
2144
470p
2176
82K
270p
2155
3149
2u2
2158
50V
50V 2u2
2163
L
R
+8V
+8V
+8V
CL36532008_074.eps
290403
Vref
rectifier
Gain cell
+8V
OUT
R3
1k
C5
2,2u
10u
C4
1u
C3
R2
1k
C2
2,2u
R1
1k
C1
2,2u
in
mdi - 075eps
+
-
FCE717
PRE
AMP
AMP
LOCK
DETECT
DIGITAL PHASE
COMPARATOR
CHARGE PUMP
REFERENCE
DIVIDER
DIVIDER
1/2
17-BIT
DIVIDER
17-BIT LATCH
DIVIDE RATIO
I
2
C-BUS
TRANSCEIVER
1-BIT
LATCH
2-BIT
LATCH
3-BIT
ADC
POWER-ON
RESET
MODE
CONTROL
LOGIC
3-BIT
INPUT
PORTS
4-BIT LATCH
AND
OUTPUT PORTS
XTAL
OSCILLATOR
4-BIT LATCH
2
XTAL
13
RFA
14
RFB
4
AS
6
SCL
5
SDA
11
10
9
8
7
ADC
CP
1
XT/COMP
3
DRIVE
16
VCC
12
GND
15
TSA5060A
P3 P2 P1 P0
CL36532008_071.eps
010503
L+R
L-R
L-R
Subcarrier freq.
L
R
20kHz 46.875kHz 66.875kHz
Multiplex without pilot
CL36532008_076.eps
090503
Содержание LX3950W/01
Страница 21: ...7 3 7 3 AV BOARD BOTTOM VIEW LAYOUT MAPPING AV BOARD TOP VIEW LAYOUT MAPPING ...
Страница 33: ...8 2 8 2 EXPLODED VIEW Module Class D PWR307_3139 117 10501_dd wk0406 ...
Страница 55: ...11 5 11 5 1 6 Wiring Diagram ...
Страница 59: ...Layout Wireless Transmitter Board Top Side 11 9 11 9 CL36532008_097 eps 280403 ...
Страница 60: ...11 10 11 10 Layout Wireless Transmitter Board Bottom Side CL36532008_098 eps 280403 ...
Страница 63: ...11 13 11 13 Layout Wireless Receiver Board Top Side CL36532008_101 eps 280403 ...
Страница 64: ...11 14 11 14 Layout Wireless Receiver Board Bottom Side CL36532008_102 eps 280403 ...
Страница 66: ...11 16 11 16 Layout Wireless Audio Amplifier Board Top Side CL26532008_104 eps 220403 ...
Страница 67: ...11 17 11 17 Layout Wireless Audio Amplifier Board Bottom Side CL26532008_105 eps 220403 ...