EN 65
3139 785 32530
7
Circuit Diagram and PWB Layout
Power Box
Audio Board: Circuit Diagram (Part 1)
GND
(VIA)
GND
ADD
GND
(HS)
DATA_OUT1
1
2
VDD
SDA
SCL
DATA1
LRCLK1
BCLK1
0
C
SDI<0:3>
PE<0:11>
SDI<0:3>
SCL
SDA
HA2
HA0
PD<1:0>
IRQ<A:D>
PF
CORE_VDD
D
P
A
PLL_VDD
IO_VDD
CORE_GND
D
P
A
IO_GND
PLL_GND
CLOCK
SPDIF
INTERRUPTS
JTAG
TIMER
SCAN ESAI_1
SDO4
ESAI
SHI
GPIO
PC<0:11>
MOD
TIO
6
7
TDI
HCKT
FST
SCKT
HCKR
FSR
SCKR
0
1
2
3
4
5
8
SCAN
10
9
NMI_PINIT
EXTAL
ADO
ACI
A
B
D
RESET
SDO5
TMS
TDO
TCLK
1
0
HREQ
SCK
MISO
SS
MOSI
SDO4
SDO5
HCKT
FST
SCKT
HCKR
FSR
SCKR
SDO0
SDO1
SDO2
SDO3
SDO0
SDO1
SDO2
SDO3
GND
(VIA)
GND
ADD
GND
(HS)
DATA_OUT1
1
2
VDD
SDA
SCL
DATA1
LRCLK1
BCLK1
0
EN
RX5
IPS|RX6
CM1|CDTI|SDA
RX2|DIF0
RX4|DIF2
RX3|DIF1
Φ
CM0|CDTO|CAD1
SDTO
MCKO2
MCKO1
INT1
D
D
V
D
D
D
V
T
D
D
V
A
V|TX
S
S
V
A
OCKS0|CSN|CAD0
OCKS1|CCLK|SCL
P|SN
BICK
LRCK
XTI
XTO
R
FS96|I2C
PDN
INT0
RX1
DAUX
DIR
S
S
V
D
IN
OUT
ADJ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
H
I
F
G
13
14
A
B
C
D
E
F
G
H
I
A
B
C
1101 D10
2100 A4
2105 B4
2106 A11
2107 C4
2108 C4
2109 C4
2110 C4
2111 C4
2112 D2
2113 D2
2115 D9
2116 D10
2117 E9
2124 B12
2125 B11
2126 B11
2127 B11
2128 B11
2129 B11
2130 B11
2131 A12
2132 B12
2133 B12
2134 B12
2135 B12
2136 C8
2137 C9
1
2
9
10
11
12
2140 G8
2143 B12
2144 E2
2145 B9
2146 C3
2147 C3
2148 E8
2149 E2
3100 A8
3101 A3
D
E
2120 A8
2121 B11
2122 B11
2123 B12
3106 B4
3107 C12
3108 C12
3109 C10
3110 C12
3111 C12
3112 D3
3113 D3
3114 C12
2138 B11
2139 G11
3
4
5
6
7
8
3117 D10
3118 D12
3119 D1
3120 D10
3121 D12
3122 D10
3123 D8
3124 D12
3125 D12
3128 D8
3129 D9
3130 D12
3103 A8
3105 B4
2118 E8
2119 D2
3138 E3
3139 E8
3140 E10
3141 E5
3142 E10
3143 E2
3144 E9
3145 E5
3146 E3
3147 E5
3148 E5
3149 F3
3150 F4
3151 F10
3115 D3
3116 D10
3154 A11
3155 A12
3160 H9
3161 H7
3163 H7
3164 H7
3176 H10
3177 H10
3178 H10
3179 E5
3180 D2
3131 D2
3133 D12
3134 D9
3135 D12
3136 D12
3137 E5
5103 B8
5104 B11
5105 B12
5106 B11
5107 B10
5108 B12
5109 A9
7100 A3
7101 A8
7102 A11
7103 D1
7104 C4
7105 C11
7106 E8
3152 B8
3153 C9
3181 C2
3185 H12
4100 A2
4104 I11
4105 I11
5100 A4
5101 C4
5102 C5
F110 A12
7107 E9
7108 C9
7109 H8
7111 H11
3146
10K
n
0
0
1
6
0
1
2
3111
100R
100n
2119
4104
120R
5109
1
3
1
2
V
6
1
u
0
1
3
2
1
2
10K
3122
V
6
1
u
0
1
100R
3110
5104
7
1
1
2
0
n
1
u
0
1
V
6
1
6
2
1
2
n
0
0
1
0
3
1
2
3115
33R
10K
3117
100R
3106
10p
2105
3148
33R
8
1
9
1
0
2
1
2
1
3
4
3
1
16
2
15
5
6
7
8
9
14
7
1
7109
TPA5050
Φ
10
11
12
4K7
3109
2115
470n
8
1
9
1
0
2
1
2
1
3
4
3
1
16
2
15
5
6
7
8
9
14
7
1
Φ
TPA5050
7111
10
11
12
100R
3185
3121
33R
33R
3118
47R
3103
3105
R
0
0
1
V
6
1
2
2
1
2
u
0
1
100n
2139
3163
10K
K
5
1
0
5
1
3
6
3
1
2
n
0
0
1
4
4
1
3
K
0
0
1
3179
100R
3
4
1
2
n
0
0
1
10K
3108
3145
33R
59
37
32
31
30
26
27
33
54
6
55
5
56
4
57
1
58
80
2
4
1
4
47
22
76
63
77
62
36
7
14
15
16
10
11
9
21
0
4
9
3
3
4
4
4
50
49
48
35
34
46
19
18
23
13
2
0
2
4
2
5
6
4
7
3
7
1
5
2
4
6
5
7
51
45
78
61
79
60
72
67
73
66
38
70
69
2
1
8
2
3
5
8
6
8
9
2
2
5
1
7
7105
DSPC56371AF180
DSP
Φ
9
2
1
2
n
0
0
1
n
0
0
1
4
3
1
2
3133
33R
3161
10K
3116
10K
n
0
0
1
8
0
1
2
100R
3101
0
K
1
8
2
1
3
2
5
1
3
K
0
1
33R
3131
7
0
1
5
4
3
1
3
u
0
1
K
0
2
2
5
2
1
2
V
6
1
3119
100R
8
4
1
2
n
0
0
1
2120 100n
1
2
5
3
4
7101
74LVC1G32GW
p
8
1
5
4
1
2
p
8
6
4
4
1
2
K
7
4
3
2
1
3
3114
100R
F110
1
5
4
7100
74LVC1G125GW
2
3
10K
3151
R
0
0
1
n
0
0
1
0
0
1
3
8
2
1
2
7
0
1
2
V
6
1
u
0
1
5103
30R
n
0
0
1
9
4
1
2
3155
0
K
1
7106
BC847BW
2
3
1
2
1
2
1
2
n
0
0
1
u
0
1
V
6
1
100K
3139
33R
3125
5
3
1
2
n
0
0
1
4
5
6
3107
10K
28
7
18
8
11
12
13
14
15
22
3
1
2
19
20
17
16
21
26
25
27
7104
AK4113VF
9
0
1
23
30
29
24
BC847BW
7107
10K
3141
2
1
4
3
7108
24M576
DSO751SV
3153
100R
p
0
5
1
7
4
1
2
6
4
1
2
p
0
5
1
100R
3137
3142
10K
10K
3164
n
0
0
1
4
2
1
2
100n
2113
9
2
1
3
0
K
1
n
0
0
1
3
3
1
2
R
0
7
4
1
8
1
3
5101
R
0
3
33R
3112
1
3
2
4105
LD1117
7102
8
1
1
2
0
n
1
n
0
1
6
1
1
2
4
5
1
3
R
0
1
33R
3135
3130
33R
5108
5106
K
0
1
9
4
1
3
10K
3176
3177
10K
100n
2140
33R
5105
3124
5100
600R
3113
33R
10K
3138
7103
1
2
5
3
4
74LVC1G32GW
33R
3147
3143
100R
33R
3136
7
3
1
2
p
6
5
7
2
1
2
n
0
0
1
n
0
0
1
0
1
1
2
n
0
0
1
9
0
1
2
3160
33R
3120
10K
47R 3180
10K
3178
2112
100n
0
0
1
2
n
0
0
1
0
0
1
4
1101
B4B-PH-K
1
2
3
4
10K
3140
8
3
1
2
n
0
0
1
R
0
3
5102
1
1
1
2
u
0
1
SPDIF_MCLK
I2S_D_DATA
I2S_MCLK
V
6
1
+3V3
+3V3
SCL_PA
SCL_PA
+3V3
+3V3
I2S_D_LRCK
I2S_D_SCLK
I2S_D_SCLK
I2S_D_LRCK
SPDIF_IN1
SPDIF_IN0
+3V3
+3V3_SPDIF
DSP_CLK
+3V3_SPDIF
+1V25
+3V3_SPDIF
I2S_IN_LRCK
I2S_SPDIF_DATA
I2S_IN_SCLK
SDA_PA
SDA_PA
+3V3_SPDIF
RST_AK4113
SDA_PA
SCL_PA
+3V3_SPDIF
SDA_DSP
SCL_DSP
I2S_D_DATA
I2S_DSP_SCLK
I2S_DSP_LRCK
I2S_DSP_CSW
I2S_DSP_SLR
I2S_DSP_FLR
K
L
C
_
P
S
D
+3V3
SPDIF_MCLK
+3V3
+3V3
RST_DSP
+3V3
+3V3
INT_AK4113
I2S_IN_LRCK
I2S_IN_SCLK
I2S_ADC_DATA
+3V3_SPDIF
I2S_SPDIF_DATA
I2S_MCLK
+3V3
INT_DSP
SPDIF_OPT
3139-243-36064-130-01-a2 pbx.pdf 2007-01-26