EN 54
3139 785 30981
8.
Circuit- and IC Description
The sound processing is always done in stereo (that
means separate left- and right- channel) and the complete
switching is realized by using HEF4052, which is a dual
four-to-one multiplexer and MSP3415G, multi-sound
processor.
a) Record path
The complete selection of audio signal for recording is
done by a HEF4052 [7301], which is a dual four-to-one
multiplexer. The input lines for the selector [7301] are
coming either from MSP [7500] (AFEL/AFER) or cinch
rear-in Ext AIN2L/AIN2R) or the cinch front-in (AINFL/
AINFR). The [7301] controlled via RSA1- and RSA2-
signals coming from the MSP [7500]. The MSP acts as a
port expander of the slave
μ
P. The Op-Amp on the output
[7301] is necessary for performance reasons and acts
also as a driver. The selected signals ALADC and ARADC
are directly fed to the Audio-ADC. As there is also a
fi
fth
input (DV-in), the corresponding audio signals (ALDAC/
ARDAC) from the Digital board are routed via the MSP
[7500] and output as AFEL/AFER to selector [7301]
b) Cinch out
The Multiplexer (HEF4052) selects signals from a few
sources, namely Rear Cinch In (AIN2L/AIN2R), Front
Cinch In (AINFL/AINFR) and MSP (AFEL/AFER). The
multiplexer is controlled via RSA1 and RSA2 signals
coming from the MSP.
c) Digital audio-out path
In addition to the analog output the set is also equipped
with a digital audio output via cinch plug [1701]. The
signal is generated on the digital board and routed
via the audio interface cable and connector [1600] to
the Analog board. Here the DAOUT-line
fi
rst passes
a 6-fold inverter [7700] being used as a driver and
for performance reasons (noise reduction, jitter,etc).
Afterwards a transformer [5700] is necessary to achieve
the correct level and also to have a
fl
oating output with
isolated group before the signal is fed via [3712 & 3713]
to cinch plug [1701]. The capacitor [2706] performs an
AC-coupling between connector- and set-ground.
8.3.5. Audio ADC/DAC
The conversion of analog audio signals (ALADC/ARADC)
from the record-selector [7301] is done via UDA1361TS
[7606]. This IC can process input signals up to 2Vrms by
using external resistors in series to the input pins. All
required clock signals are generated on the digital board
and only the audio data ( A_DAT-line) are routed from the
Analog to Digital board for further processing.
The transformation of digital audio back into analog
domain is done by CS4351 [7603]. All necessary clock
signals are coming from the digital board and digital
audio data (D_DATA0-line) are converted into analog
signals (pin 15 and 18). The output signals from the
audio DAC part (ALDAC/ARDAC) are directly routed to
the rear cinch sockets. To avoid plops and any other
audible noise on the output there is a mute-stage
implemented for each channel. The activation of the mute
function is done via the AMUTE & BMUTE (digital silence
mute) from the audio DAC and also the AKILL line which
is a combination of the D_KILL from the Digital board and
POWER_FAIL from power supply.
