EN 37
3139 785 31500
7.
Circuit Diagrams and PWB Layouts
Analog: Control Unit (CU)
to IOA
frm/to Dig Board
V
F
m
orf
CU0
F820 B2
F821 B2
F822 B2
F825 C3
I801 E3
I802 E3
I803 E3
I804 F3
F
FAN_P
WS0
WS0
FAN_N
F805 E4
F806 E4
F807 F3
F808 A2
F809 C2
F810 C2
F811 B2
F812 B2
F813 B2
F814 B2
F815 B2
F816 B2
F817 B2
F818 B2
F819 B2
A
CU0
dr
a
o
B
T
N
O
R
F
ot/
mrf
OPTION
N
A
F
ot
*
Control Unit CU
B
C
D
E
7802 F3
7803 E3
to IOV
1
2
3
4
1
2
3
4
A
B
C
D
E
F
0005 E1
1800 C1
1803 B3
1804 E4
2800 E3
3800 D1
3801 E1
3802 E2
3803 E2
3804 F2
3805 E3
3806 E3
3807 F3
3808 D2
3809 D2
3810 C3
4800 E2
7800 D2
7801 E2
F825
3
K
3
4800
5
0
8
3
F817
PROTECTION FOIL
0005
K
0
1
9
0
8
3
F812
F820
3V3SW
F813
F822
7
K
4
3
0
8
3
3800
1K0
0
K
1
7
0
8
3
5V
7
8
9
BSH103
7800
11
12
13
14
2
3
4
5
6
1803
HLW14S-2C7-LF
1
10
BC847BW
7802
F816
F808
I804
F815
3V3SW
19
2
20
3
4
5
6
7
8
9
1
10
11
12
13
14
15
16
17
18
1800
HLW20S-2C7
4
0
8
3
7803
BC327-25
7
K
4
7
0
8
F
7801
BSH103
1K0
3801
0
0
8
2
V
5
2
u
0
1
F805
12VSTBY
I802
F818
0
1
8
3
K
7
4
1
2
F821
B2B-EH-A
1804
6
0
8
3
0
R
1
F810
F819
F814
F806
I801
I803
F811
F809
68R
3802
K
0
1
AIN_SEL0
L
R
T
C
_
N
A
F
FAN_CTRL
ODD_ON
N
O
_
D
D
O
GND
GND
GND
8
0
8
3
GND
GND
Y
B
T
S
V
5
IPFAIL
LI
A
F
PI
5VSTBY
5VSTBY
C
R
RC
HOST_RESET
HOST_RESET
1
L
E
S
_
NI
A
AIN_SEL1
0
T
E
D
_
N
U
T
TUN_DET0
1
T
E
D
_
N
U
T
TUN_DET1
0
L
E
S
_
NI
A
SDA0
SDA0
RDY_FM
RDY_FM
D_FM
D_FM
D_HOST
D_HOST
SCK
SCK
ATN_FM
ATN_FM
FBIN
8SC2_1
8SC2_2
12VSTBY
12VSTBY
VGNSTBY
VGNSTBY
STBY
STBY
FAN_CTRL
SDA0
SCL0
5VSTBY
SCL_5V
SDA_5V
5VSTBY
SCL0
SCL0
3139_243_32694_a4_sh130_sh8.pdf 2005-07-08