Philips DPTV400 Series, Руководство по обучению

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Set Control and I2C Busses (Figure 40)
Commands to the set by the Consumer are sent via the Keyboard and Remote Control to the
Painter (Microprocessor), 7001, located on the SSB. The Painter sends commands to the ATSC
Digital Decoder on the SDA-S line via the SSM. The Digital Decoder controls the Tuner, Sound
Processor, and other devices on the ATSC module.
The NVM, 7012, on the SSB stores Option Codes, Error Codes, and Customer settings. The SDA-F
line controls the HIP (High end Input Processor) and MSP (Audio Processor) on the SSB. This line
also controls the AV in switch on the SSM and the time Clock. This line is also used to send com-
mands to 7700, HD/DW Processor. The ComPair connector is located on the SSM and is connect-
ed to the SDA-F line. The HD/DW processor controls the devices on the HD/DW module.
The RXD and TXD lines on the Painter communicate with the GDE processor located on the SSM.
The GDE processor controls the HOP via the SDA-C line. It communicates with the Convergence
Processor and NVM via the SDA-B line. The NVM on the SSM stores White Tone information,
Geometry settings, and Convergence data. The Standby and DAM_CTL lines control power switch-
ing in the set. The Standby switches the Main and Standby supplies. The DAM_CTL line switches
power to the ATSC module.
OSD Signal Path (Figure 41)
On-Screen Displays are generated by the Painter, ATSC Processor, GDE Processor, and
Convergence Processor. When the Menu button is pressed or a channel is entered, the OSD is
generated by the Painter on the SSB. Display related to channel display information, other that ini-
tial channel entry, is generated by the ATSC module.
When the set is placed in the SAM (Service Alignment Mode), the SAM menu is generated by the
Painter, 7001. When the GDE sub menu is selected, the display is generated by 7100, GDE
processor.
During the Convergence mode, the menus are generated by the GDE processor. The Convergence
Grid is generated by the Convergence processor.
OSD information from the Convergence Processor, 7052, is buffered by transistors 7059, 7060,
7061, and 7062. OSC information from the GDE and Painter is added. The OSD is then fed to the
HOP, 7600, where it is inserted into the YUV picture information from the HD/DW module.
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