Circuit Description
GB 52
CDR Mozart
9.
Figure 9-7
9.4.8
Flow Control
In case a RACOON drive is connected, the SUR and CPR
signals act like normal flow control lines. RACOON can send
data to Mozart as long as FREYA_SUR is high. When Mozart
buffer is full, FREYA_SUR goes low to indicate to RACOON
to stop sending data.
Figure 9-8
FREYA_CPR is high as long as RACOON is able to receive
data. When FREYA_CPR goes low, Mozart has to stop
sending data.
Figure 9-9
9.4.9
I
2
C
The Mozart uP is the I
2
C slave, the display uP is the I
2
C
master. Note that potentiometer 7402 is connected to the
same I
2
C bus. The display P controls Mozart and the
potentiometer by means of the I
2
C bus. The I
2
C bus is an
open collector bus, which means that connected devices can
only make the bus low. Making the signal high is done by
going to tri-state (Hi-Z). Pull-up resistors on the bus are
foreseen on the display board.
Figure 9-10
9.4.10 Debug Port
Connecor 1000 is an BDM interface. This BDM is an optional
debug port. This is only used for development purpose and
will not be mounted in the final product and is no part for
service diagnostics.
9.4.11 Memory
Flash Memory
Flash 7101 is used for the booting of the Mozart uP. This
flash contains the initial start-up code to initialize the Mozart
Module. It also contains the complete application code.
However this code is stored in a compressed format. After
the initialization, the compressed data is de-compressed and
copied into SDRAM. After copying, Mozarts’ Program
counter is set to SDRAM and from that point onwards, the
code is executed from the SDRAM.
A part of the flash memory is also used for temporary storage
of CD-text info.
Flash is connected to Mozart Address- and Data-bus. The
CS0 signal is the chip select signal.
Figure 9-11
SDRAM
SDRAM is connected to the same address/data bus as the
flash IC. The control bus is a separate bus.
SDRAM is used as system data memory and as code
memory.
SDRAM runs at 48 MHz (half the processor frequency).
I
2
C Address Selection
Data bus is pulled-down with resistors 3112, 3114 and 3116.
For the following purpose:
At start-up Mozart checks the value of the DATA lines 16, 17
and 18. The values of these bits will represent the 3 LSBs of
Mozarts’ I
2
C slave address. This opens the opportunity to
change those three data lines so one can have 8 different I
2
C
addresses for 8 different modules. These addresses are
applied for factory test purposes and have no service
applications.
SUR
RXD2
CL 16532046_030.eps
080501
RXD2
SUR
CL 16532046_031.eps
080501
TXD2
CPR
CL 16532046_032.eps
080501
Display-
Unit
Mozart
pos.7000
Potmeter
pos.7402
IIC-bus
Conn.1007
CL 16532046_033.eps
230501
Start-up code
CD-text
Application code
19
A0-A18
DQ0-DQ15
(A-1)
RY/BY
CE
OE
WE
RESET
BYTE
CL 16532046_034.eps
230501