Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 134
BJ2.4U/BJ2.5U PA
9.
DCU (Data Capturing Unit)
Figure 9-21 DCU block diagram
The purpose of this block is to acquire digital data (containing
Teletext, Closed Captions, ...) from a CVBS/Y/C video input
source. It performs processing on the received data and
provides the data to the ITU-656 formatter unit.
The decimator reduces the sample rate (from 27 MHz to 13.5
MHz) of the incoming digitized CVBS or Y data stream from the
I
2
D receiver. From the video input, the data slicer reconstructs
the transmitted bit stream and associated clock. The SERPAR
block converts the serial bits, coming from the data slicer, into
parallel bytes. The packet processor performs data decoding
and some error correction, assembles received bytes into
packet structure, and streams out the data to the ITU-656
formatter.
The acquisition-timing block locks onto sync signals, and
provides timing information to the other blocks of the data
capture unit.
ITU656 Output Formatter
Figure 9-22 ITU656 formatter block diagram
The ITU656 formatter gets YUV data as video input signal,
coming from the VIDDEC block. These YUV data are either
decoded CVBS signals, matrixed RGB signals, or YUV input
signals. The second input data are VBI sliced data coming from
the DCU. The output of the ITU delivers a data stream, which
is ITU-601/656/1364 compliant, and includes video as well as
the VBI data.
DEMDEC (Demodulator and Decoder)
Figure 9-23 DEMDEC block diagram
The demodulator and decoder (DEMDEC) is responsible for
demodulating and decoding incoming SIF signals.
The main features of the DEMDEC are:
•
Auto Standard Detection (ASD).
•
DQPSK demodulation for different standards,
simultaneously with 1-channel demodulation.
•
NICAM decoding (B/G, I, D/K, and L standard).
•
Two-carrier multi standard FM demod. (B/G, D/K and M).
•
Optional AM demodulation for system L, simultaneously
with NICAM.
•
Identification A2 systems (B/G, D/K and M standard) with
different identification time constants.
•
FM pilot carrier present detector.
•
BTSC MPX decoder.
•
SAP decoder.
•
dBx noise reduction.
•
Japan (EIAJ) decoder.
•
FM radio decoder.
Audio Processing
Figure 9-24 Audio processing block diagram
Main features are:
•
Master volume control and Balance.
•
Tone control (Loudness, Bass, Treble, Equalizer).
•
Dolby ProLogic delay.
•
Incredible Mono and Stereo.
•
Virtual Dolby Surround (VDS 522, 523).
•
Virtual Dolby Digital (VDD 522, 523).
•
Digital audio I/O interface (stereo I2S input interface).
•
Eight audio DACs for six channel loudspeaker outputs and
stereo headphones output.
•
Audio DACs for stereo SCART output and stereo LINE
output.
•
Serial data link interface for interfacing with the analog
multi-purpose interface IC PNX3000 (MPIF).
E_14700_072.eps
310505
Data Capture Unit
Data Slicer
Decimator
Acquisition
Timing
SERPAR
Packet
Formatter
VBI data
packets
I2d Data_1
(cvbs)
I2d Data_2
(Y)
H/V Sync
Field Id
E_14700_073.eps
310505
ITU656 Formatter
Video Data
Processing
VBI Data
Processing
SERPAR
ITU_out (9:0)
YUV
VBI data
packets
ITU_Clk
ITU_DATA_VALID
E_14700_074.eps
300505
down
mixer
decimation
FM / AM
demod.
ch. 1
FM / AM
demod.
ch. 2
NICAM
demod. &
decoder
FM ident
MPX
demod.
SAP / EIAJ
demod.
noise
detector
hardware
control &
status reg.
pre-process
decimation
filters,
deemph.,
dbx,
select
SRC
5 channels
tc
el
es
&
xi
rt
a
me
d
DDEP (DemDec Easy Programming)
decimation
2
2
4
ADC1,2, PIPMONO, Ext. AM
DEMDEC DSP
DEC L/A
DEC R/B
MONO
SAP
PIPMONO
ADC
SIF
control / status registers (XMEM)
2
f
1
f
2
f
pilot
fs = 27 MHz
+
L, R
SUB
C
Master V
o
lume & T
rim
OFF/ I-Mono /
I-Stereo
MAIN
Ba/Tr
or EQ
Loudn.
or
BBE
®
Bass Management
Dela
y
Digital Output Crossbar
C
Ba/Tr
or EQ
Loudn.
Ls/Rs
Ba/Tr
or EQ
L,R
SM
AUX1
Ba/Tr
AUX1
Vol/Trim
AUX1
SM
AUXx
Vol/Trim
AUXx
SM
Noise/
Silence
Gen.
(L+R)/2
SUB
SM
C
SM
Ls
SM
+
DAFO1
I2S1L,R OUT
to
I2S6L,R OUT
MAIN
C
Ls
AUX1/ HP
AUX2,3,4,5,6
5 equal channels for I2S, DAC1, DAC2
C IN
S/Ls IN
L,R
Audio Monitor
Le
vel Adj.
AU
X
2
-6
Digital Input Crossbar ( SSel, Matr
ix )
A
UX1
MAIN
Rs IN
L,R
LFE
Rs
Ls
Rs
Ls
Rs
Rs
SM
+
SW Filter
Beeper
6
DAFO2
DAFO3
DAFO4
DAFO5
DAFO6
DAFO7
DAFO8
DPL II
®
DUB or DBE
in L,R or SUB
Hall/
Matrix
L,R,C,Ls,Rs (DPL II)
5
A
u
tomatic V
olume Le
veling
C
S/Ls
Rs
LFE
AVL
Contr.
Acoustical Compensation
DEC (L/A,R/B, Mono, SAP)
PIPMONO
ADC (L/A, R/B)
I2S IN 1 to 6
Level
Adj.
VIRT
VDS
®
522,523
VDD
®
522,523
MAIN MSel
C
MSel
S,Ls
Rs
MSel
L,R (DPL II)
L,R (M,ST, 5.1)
L,R (M,ST, 5.1)
C (DPL II)
C IN
C Hall/Matrix
(L+R)/2
C VIRT
L,R VIRT
Ls,Rs (DPL II)
S/Ls IN
S Hall (L+R)/2
S Matrix (L-R)/2
Rs IN
DAC2
L,R
DAC1
L,R
E_14700_075.eps
250505