Circuit Descriptions
7.
Figure 7-4 Front-End Analogue block diagram
7.4.2
DVB-T2 DTV part
The Front-End for DVB-T2 DTV consist of the following key
components:
•
TDSY-G720D (DVB-T2)
•
SCALER MT5580PUEI/B PBGA-511 TV Processor
•
DEMODULATOR CXD2842ER-T4 VQFN-48
Below find a block diagram of the front-end application for
DVB-T2 DTV.
Figure 7-5 Front-End DVB-T2 DTV block diagram
7.5
Front-End Analogue and DVB-S2 reception
7.5.1
Front-END DVB-S2 part
The Front-End for DVB-S2 application consist of the following
key components:
•
TUNER EUROPE TDQS-A901F for K series (DVB-S2)
•
TUNER EUROPE ST25CS-2-E (DVB-T/C)
•
TEST ONLY Others AVL6211LA LQFP-64 for (K model)
S2 Demond
•
SCALER MT5580PUEI/B PBGA-511 TV Processor
Below find a block diagram of the front-end application for
DVB-S2 part.
Figure 7-6 Front-End DVB-S2 block diagram
This application supports the following protocols:
•
Polarization selection via supply voltage (18V=horizontal,
13V=vertical)
•
Band selection via “toneburst” (22kHz): tone “on”= “high”
band tone “off” = “low” band
•
Satellite (LNB) selection via DiSEqC 1.0 protocol
•
Reception of DVB-S (supporting QPSK encoded signals)
and DVB-S2 (supporting QPSK, 8PSK, 16APSK and
32APSK encoded signals), introducing LDPC low-density
parity check techniques.
7.6
HDMI
Refer to figure
for the application.
Figure 7-7 HDMI input configuration
The following HDMI connector can be used:
•
HDMI 1: HDMI input (TV digital interface support HDCP)
with digital audio / PC DVI input/ARC
•
HDMI 2: HDMI input (TV digital interface support HDCP)
with digital audio / PC DVI input
•
HDMI input (TV digital interface support HDCP) with digital
audio / PC DVI input
•
+5V detection mechanism
•
Stable clock detection mechanism
•
Integrated EDID
•
HPD control
•
Sync detection
•
TMDS output control
•
CEC control
7.7
Video and Audio Processing - MT5580PUEI/B
The MT5580PUEI/B is the main audio and video processor (or
System-on-Chip) for this platform. It has the following features:
•
Multi-standard digital video decoder (MPEG-2, H.264,
MPEG-4)
IF
IF_AGC
RF_AGC
MT5580
IF_AGC
ST25CS-2-E
I
2
C
I
2
C
19600_203.eps
IF
T
S
DA
T
A
RF_AGC
MT5580
T2 demod
CDX2842ER
IF_AGC
TDSY-G720D
I
2
C
I
2
C
I
2
C
19600_204.eps
TS DATA
IP/IN/OP/ON
Tuner I2C
Tuner I2C
System I2C
MT5580
MCU ARM Cortex-A9
MPEG/vedio/audio
decoder
Scaling
Vedio enhancement
3D comb
LVDS Transmitter
HDMI 1.4
ADC
H 264
Build-in HDMI swich x 3
min LVDS Transmitter
ATD build-in
DVB-T/C Demond
Head phone Amp
USB x 2
PHY
LNB power
AVL6211LA
S2 tuner
S2 function
19600_205.eps
19600_206.eps
MT5580
HDMI1
HDMI2
HDMI SIDE
CN501
CN502
CN503
BRX
RX
RX
I2C
I2C
I2C