Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
9.11.2
Diagram B6B, MAS3528E (IC7A30)
Figure 9-35 Internal Block Diagram and Pin Layout
S/PDIF
in
Serial In
I
2
S
I
2
S
Clock
PIO
Serial Out
I
2
S
S/PDIF
out
RISC DSP Core
S/PDIF in
Serial inputs
Serial Control
S/PDIF out
I2S output
additional
inputs and outputs
/9+3/
(Dolby Digital,
MPEG-1 Layer-2, PCM)
CLKO
XTO XTI
18.432 MHz
MAS 3528E
CL 36532008_143.eps
090503
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
18 19 20 21 22 23 24 25 26 27 28
6
5
4
3
2
1
44 43 42 41 40
AVSS
AVDD
XTI
XTO
N.C.
N.C.
CLKO
SOD1
SOD2
SOD3
SPDIFOUT
SPREF
SPDI
PR
PCS
PI19
PI18
PI17
PI16
PI15
PI14
PI13
POR
I2CC
I2CD
VDD
VSS
TE
SYNC
EOD
RTR
RTW
SPDI2
SIC
SII
SID
XVSS
XVDD
PI4
PI8
SOC
SOI
SOD
PI12
MAS 3528E
Содержание 28PW9618
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Страница 172: ...Revision List EN 172 EM6E 11 11 Revision List First release ...