Philips 231T1SB/00, Руководство по обслуживанию

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Meridian 1
4B SUBPAGE
54 INDEX
55 SUBTITLE
56 HOLD
57 REVEAL
5B FAV
5A CH-LIST
0E AD
12 RREEZE
3.3 External Interface
3.3.1 Video Signal Requirements
y CVBS Input 1000mVpp (including 300 mV sync level), terminated with input impedance of 75
Ω
.
y S-Video Input
Y: 1000mVpp, C: 300mVpp, terminated with input impedance of 75
Ω
.
y Component Video
Input
Y: 1000mVpp, PbPr: ±350mVpp, terminated with input impedance of 75
Ω
. 480i/p, 576i/p,
720p, 1080i/p signal handling capability.
y HD Ready
HD ready logo required.
Display engine:
¾ The minimum native resolution of the display (e.g. LCD, PDP) or display engine (e.g.
DLP) is 720 physical lines in wide aspect ratio.
Video Interfaces:
¾ The display device accepts HD input via:
‹
Analog YPbPr. “HD ready” displays support analog YPbPr as a HD input format to
allow full compatibility with today's HD video sources in the market. Support of the
YPbPr signal should be through common industry standard connectors directly on
the HD ready display or through an adaptor easily accessible to the consumer; and:
¾ DVI or HDMI HD capable inputs accept the following HD video formats:
‹ 1280x720 @ 50 and 60Hz progressive scan (“720p”)
‹ 1920x1080 @ 50 and 60Hz interlaced (“1080i”)
¾
The DVI or HDMI input supports copy protection (HDCP).
y SCART
Full SCART, including CVBS in/out, RGB/Sync, audio L/R in/out. Pin 8, the
function-switching pin, carries a signal from the source that indicates the type of video
present, 0V means no signal, or internal 6V means a widescreen (16:9) signal
+12V means a normal (4:3) signal.
Define SCART behavior:
Philips_MNT_Scart_
behavior.doc