Philips 220V3AB/00, Руководство по обслуживанию

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1 1
2 2
3 3
4 4
5 5
A
A
B
B
C
C
D
D
.
S
c
al
ar
D
iag
ra
m
&
C
.B
.A
220V3 LCD
41
RX OC -
RX O3 +
SP
I_
D
O
RX E0 +
SP
I_
C
L
K
RX E2 -
RX O0 +
RX O3 -
V G A _ C A B LE _D E T
XI
RX O1 +
RX E2 +
RX O2 -
RX E1 -
RX E3 -
RX O1 -
RE
SET
B
D V I_ C A B LE _D E T
RX O2 +
RX E0 -
SP
I_
DI
RX E1 +
XO
RX O0 -
RX OC +
RX E3 +
SP
I_
CE
V_ Sy nc
H_ Sy nc
RX2
+
RX2
-
RX1
-
RX1
+
RX0
-
RX0
+
R
XC-
RXC
+
Pow
er
_LE
D
VGA_
S
D
A
VGA_
S
C
L
D
V
I_
SDA
D
V
I_
SCL
Low
_Pow
er
B
L
_EN
B
L_A
D
J
DV
I_
HP
D
IR
_
O
N
F
unct
ion_LED
Pow
er
_
K
e
y
A
DC_
K
E
Y1
AD
C
_
K
E
Y
2
DV
I_
D
E
T
VGA_
D
E
T
V
O
L_A
D
J
MU
T
E
IR
_A
DJ
P
A
N
EL_+5V
T2_+
5
V
Pr
esent
_O
U
T
K
E
Y
_PO
W
E
R
U
S
B
_det
ect
P
ivot
Pi
vot
_
O
N_
O
F
F
BL UE -
BL UE +
GR EE N-
GR EE N+
RE D-
RE D+
SO G
V
C
C
_1V
2
+3
.3
V
TMDS_VDD
+3
.3
V
+3
.3
V
AV
DD_3V3
SD
RAM_VDD
Crystal_VDD AV
DD_3V3
TMDS_VDD
AV
DD_3V3
SD
RAM_VDD
+3
.3
V
+3.
3
V
V
C
C
_1V
2
A
D
C
_1V
2
Crystal_VDD
+3
.3
V
+3
.3
V
+3
.3
V
TM
DS_VDD
V
C
C
_1V
2
VC
C
_
1
V
2
+3
.3
V
A
D
C
_1V
2
SDRAM_VDD
+3.
3V
+3
.3
V
RX EI N1 +
RX EI N0 -
RX EI N1 -
RX EI N0 +
RX EI N3 +
RX EI N3 -
RX EI N2 +
RX EI N2 -
RX EC KI N-
RX EC KI N+
RX OI N1 +
RX OI N0 +
RX OC KI N+
RX OI N2 +
RX OI N2 -
RX OI N1 -
RX OI N0 -
RX OC KI N-
RX OI N3 +
RX OI N3 -
E D ID _ W P
Pin
1
1
8
PW
ON
Latch
\
:
Internal
MCU
:Pull
High
External
MCU
:Pull
Low
2
2
6
1
W
/
2
2
7
1
W
/
2
281W-->L6
L17
(No
Support
1.2V)(3.3V-->1.2VLDO
C70
C71
)
2261
/
2271
/
2281-->L6
L17
(Support
1.2V)
2271RW
/
2
2
8
1RW
-->L6
L17
(Support
1.2V)
S
OT-223
R
L
6
1
3
8
D
i
gital
Port0
(
pin2~11)
must
be
reserved
Pin
1
1
9
Pull
up-
no
rmal
mode
Pull
down-
scan
mode
-p
ull
up,
Pin
GPIO
,
outp
ut
(
T
o
u
c
h
I
C
A
lert)
(PW
M
4
)
(PW
M
1
)
(
P
WM0)
(
P
WM2)
(
P
WM5)
EMI
Solution
201
0.11.03
-
Hiko
Flash
c
lock
:
---
C34
:
N
C
ʈ
10P(1
0P=0.01n=0.00001U)
---
L8
:
Z22
0
ʈ
Z120
---
C38
:
10U
N
C
ʈ
10P
Flash
V
c
c
:
-
-
-
A
d
d
L
1
5
Z
6
0
0
Before
C47
---
C47
:
1
U
N
C
ʈ
0.1U
2
0
10.11.12
=
=
=
=
=
=
=
========================
C
h
a
n
g
e
C39/C40
from
33P
to
27P
f
o
r
XTAL
test
Change
0J.47612.089
t
o
0J.47622.18B
(Beacause
the
Height
limi
t
o
f
C
2
7
a
n
d
C
4
4
need
under
9mm)
w
illi_2011.01.18
Change
0J.47612.089
t
o
0J.47622.18B
(Beacause
the
Height
limi
t
o
f
C
2
7
a
n
d
C
4
4
need
under
9mm)
w
illi_2011.01.18
U8:
DSN
is
7A.02281.00E.
BOM
is
7A.02261.W
0
E
U10:
DSN
is
7B.02520.B01.
BOM
i
s
7B.02520.G01
C35:
Change
0J.47612.08
9
t
o
0J.47622.18B
willi_20
11.02.20
C46:
Change
0J.47612.08
9
t
o
0J.47622.18B
willi_20
11.02.20
C47:
Change
7H.10422.2B
1
t
o
7H.10491.4F1
willi_201
1
.
02.20
C24:
Change
7H.10610.5B
1
t
o
7H.10611.511
willi_20
11.02.20
C42:
Change
7H.10610.5B
1
t
o
7H.10611.511
willi_20
11.02.20
R8
5
100K
J
R8
7
N
C
_6.
2K
C2
6
0.
1
U
Z
R6
2
10K
J
C3
4
10
P
J
C3
3
0.
1
U
Z
L5
Z30
R8
0
560
C4
7
0.
1
U
Z
U8
R
TD
2271R
W
-G
R
TM DS _V DD /D P_ VD D
1
TM DS _R EX T
2
RX 2P_0 /LAN E0P
3
RX 2N_0 /LAN E0N
4
RX 1P_0 /LAN E1P
5
RX 1N_0 /LAN E1N
6
RX 0P_0 /LAN E2P
7
RX 0N_0 /LAN E2N
8
RX CP _0/LA NE 3P
9
RX CN _0/LA NE 3N
10
TM DS _G ND /D P_ GN D
11
RX 2P_1 /LAN E0P
12
RX 2N_1 /LAN E0N
13
RX 1P_1 /LAN E1P
14
RX 1N_1 /LAN E1N
15
RX 0P_1 /LAN E2P
16
RX 0N_1 /LAN E2N
17
RX CP _1/LA NE 3P
18
RX CN _1/LA NE 3N
19
TM DS _V DD /D P_ VD D
20
AV S0
21
AH S0
22
AD C_ VD D
23
B0 -
24
B0 +
25
G0 -
26
G0 +
27
SO G0
28
R0 -
29
R0 +
30
GP I/GP O /V8_7
31
GP I/GP O /V8_6
32
AD C_ GN D
38
GP I/GP O /V8_1
37
GP I/GP O /V8_2
36
GP I/GP O /V8_3
35
GP I/GP O /V8_4
34
GP I/GP O /V8_5
33
AU
D
IO
_
S
O
U
T
L
/
V8_3
/
S
C
K
/
G
P
IO
45
S
P
D
IF
3
/
AU
D
IO
_
R
E
F
/
V8_4
/
W
S
/
G
P
IO
44
A
-A
DC0
/
V
CL
K
/
GP
IO
50
A-
AD
C
1
/
G
P
IO
51
US
B
_
DDCS
CL
1
/
A
-A
DC2
/
G
P
IO
52
US
B
_
DDCS
DA
1
/
A
-A
DC3
/
G
P
IO
53
GP
IO
54
T
CON[
0
][
5
]
/
P
W
M
1
/
P
W
M5
/
G
P
IO_
US
B
55
T
CON[
1
][
4
]
/
II
C
S
C
L
/
GP
IO
56
V8_7
/
G
P
IO
41
T
CON[
9
][
1
1
]
/
II
C
S
D
A
/
GP
IO
57
T
C
ON[
7
][
1
0
]
/
DDCS
CL
1
/
GP
IO
58
T
CON[
3
][
5
]
/
DDCS
DA
1
/
GP
IO
59
V
CCK
60
P
GND
61
PV
C
C
62
DV
I_
CT
RL
_
OUT
1
/
T
CON[
1
][
8
]
/
P
W
M
2
/
GP
IO
63
S
D
0
/
S
P
D
IF
0
/
T
CON[
0
][
7
]
/
G
P
IO
/
P
W
M0
64
A
UDI
O_
HOUT
L
/
V8_1
/
S
D
0
/
G
P
IO
47
A
UDI
O_
HOUT
R
/
V
8
_
0
/
P
W
M
0
/
GP
IO
48
SC K/T CO N[4] [ 2]/G PIO /B LU 7
66
MC K/ TC ON [ 5] [ 9]/G PIO /B LU 6
67
SD 0/ SP DIF 0/T CO N[13] [ 3]/G PIO /B LU 5
68
LI
N
E
_I
N
L
/
V8_6
/
II
C
S
C
L
/
G
P
IO
42
SP DIF 1/S D1 /TC ON [ 7] [ 3]/G PIO /II CS CL /BLU 4
69
SP DIF 2/S D2 /TC ON [ 9] [ 11]/G PIO /II CS DA /B LU 3
70
BC LK P/ SP DIF 3/ SD 3/ TC ON [ 10 ] [8 ]/ GP I/ GP O /P WM 1/ PW M5 /B LU 2
71
BC LK N/T CO N[6] [ 12]/G PI/G PO /PW M3
72
VC CK
73
BL U7 /BLU 1/ GP I/GP O /TX O3+ _8b/I I S_S D0 ( S PD I F0)
74
BL U0 /BLU 6/ GP I/GP O /TX O3- _8b/I I S_M CK ( S PD I F1)
75
GR N7 /GP I/GP O /BLU 5/ TX OC +_ 8b
76
GR N6 /GP I/GP O /BLU 4/ TX OC - _8b
77
AU
D
IO
_
S
O
U
T
R
/
V8_2
/
M
C
K
/
G
P
IO
46
PV CC
84
PG ND
85
RE D7 /G RN 3/T XE 3+_8b
86
LI
N
E
_I
N
R
/
V8_5
/
II
C
S
D
A
/
G
P
IO
43
GP I O /P WM 3/ TC ON [ 11 ] [6 ]
99
VC
LK
/
G
P
IO
40
LS
_AD
C
_VD
D
49
MCK
/
T
CON[
7
]
/
G
P
IO
/
A
U
X
_
O
E
108
G
P
IO
/
V8_0
39
XO
127
XI
128
WS /T CO N[7 ] [1]/G PI/G PO /PW M1
65
GR N5 /GP I/GP O /BLU 3/ TX O2 +_8b /I IS _SC K( SP DIF 2)
78
GR N4 /GP I/GP O /BLU 2/ TX O2 - _8b /I IS _WS ( S PD I F3)
79
GR N3 /GP I/GP O /GR N7 /T XO 1+ _8b
80
GR N2 /GP I/GP O /GR N6 /TX O1- _8b
81
GR N1 /GP I/GP O /GR N5 /T XO 0+ _8b
82
GR N0 /GP I/GP O /GR N4 /TX O0- _8b
83
RE D6 /G RN 2/ TX E3 - _8 b
87
RE D5 /R ED 7/ TX EC +_ 8b
88
RE D4 /R ED 6/ TX EC - _8 b
89
RE D3 /R ED 5/ TX E2 +_ 8b
90
RE D2 /R ED 4/ TX E2 - _8 b
91
RE D1 /R ED 3/ TX E1 +_ 8b
92
RE D0 /R ED 2/ TX E1 - _8 b
93
DE NA /TX E0+ _8b
94
DH S/ TX E0 - _8 b
95
DC LK/G PI/G PO /PW M0
96
DV S/ GP I O /P WM 1
97
GP I O /P WM 2
98
GP I O /P WM 4/ TC ON [ 12 ] [3 ]
100
GP I/ GP O /P WM 5/ TC ON [ 0]
101
SD 3/ SP DIF 3/T CO N[10]/G PIO /P WM 0
102
S
D
2
/
S
P
D
IF2
/
T
C
O
N
[8]
/
G
P
IO
/
II
C
S
C
L
/
P
W
M
1
/
D
VI
_C
TR
L_O
U
T
2
103
S
D
1
/
S
P
D
IF
1
/
T
CON[
5
]
/
G
P
IO
/
IR
QB
/I
IC
S
D
A
104
SD
0
/
SPD
IF
0
/
T
C
O
N
[9
]
/
G
PI
O
/
T
X
D
A
T
A
105
PV
C
C
106
PG
N
D
107
S
C
K
/
TC
O
N
[3
]
/
G
P
IO
/
AU
X_D
1
109
W
S
(S
D1
)
/
T
CON[
2
][
6
][
7
]
/
G
P
IO
110
S
D
0
/
S
P
D
IF
0
/
T
C
O
N
[4
][7
]
/
G
P
IO
111
S
D
1(
W
S
)/
S
P
D
IF1
/
T
C
O
N
[5]
[9
]
/
G
P
IO
112
S
D
2(
S
C
K
)
/
S
P
D
IF
2
/
TC
O
N
[1]
[11]
/
G
P
IO
/
AU
X_D
2
113
S
D
3
(MCK
)
/
S
P
D
IF
3
/
T
CON[
0
][
1
3
]
/
P
W
M
4
/
GP
IO
114
SPI
_
S
C
L
K
/
SD
IO
115
S
I
/
MCU_
S
C
L
K
116
SO
/
S
C
S
B
117
CE
B
/
IRQB
118
G
P
O
/
PW
M
5
/
SPD
IF
1
119
V
CCK
120
DDCS
CL
3
/
GP
IO
/
A
UX
_
CH_
P
1
121
D
D
C
S
D
A3
/
G
P
IO
/
AU
X_C
H
_
N
1
122
DDCS
CL
2
/
GP
IO
/
A
UX
_
C
H_
P
0
124
DDCS
DA
2
/
GP
IO
/
A
UX
_
CH_
N0
123
RE
S
E
T
B
125
G
P
IO
/
P
W
M
1
/
S
P
D
IF
2
126
R8
6
6.
2K
R6
9
NC_
1
0
K
J
L10
N
C
_
Z30
U9
A
T24C
16N
-10S
I-
1
.8
A0
1
A1
2
A2
3
GND
4
VC
C
8
WP
7
SC
L
6
SD
A
5
C3
6
0.
1
U
Z
R7
4
33K
L7
Z30
R6
3
10K
J
+
C2
7
<S
pec
>
47U
25V
M
1
2
+
C4
4
<S
pec
>
47U
25V
M
1 2
R6
0
4.
7K
J
C4
3
0
.1
U
+
C3
5
<S
pec
>
47U
25V
M
1 2
U1
0
W
25X
20V
S
N
IG
CE
#
1
SO
2
WP
#
3
VS
S
4
SI
5
SC
K
6
HOL
D#
7
VD
D
8
L6
Z30
U
1
1
N
C
_
R
M
2101B
0LA
GN D
2
VO
U
T
3
VI
N
1
GN D
4
R5
8
10K
J
R7
1
0
J
R6
4
10K
J
C2
5
0
.1
U
Z
R7
3
10K
+
C4
6
<S
pec
>
47U
25V
M
1
2
C2
9
0
.1
U
Z
R8
3
N
C
_20K
C2
4
10U
M
C4
1
0
.1
U
C3
9
27P
J
Y1
14.
31818M
H
Z
R6
6
N
C
_4.
7K
C3
7
0
.1
U
Z
C4
2
10U
M
R7
8
47K
J
C3
8
NC_
1
0
P
J
R6
8
N
C
_
4.
7K
J
R8
2
NC_
1
0
K
J
R7
7
4.
7K
C4
0
27P
J
R7
2
0
J
R6
7
N
C
_4.
7K
C3
0
0.
1
U
Z
C4
8
N
C
_10UF
M
R5
9
4.
7K
J
C2
8
1U
K
R7
5
0
J
L8
Z120
L4
Z30
C3
2
0.
1
U
R6
1
10K
J
R8
4
100K
J
R7
0
NC_
1
0
K
R6
5
10K
J
L9
N
C
_Z30
C4
5
0.
1
U
R7
6
0
J
R7
9
N
C
_
10K
J
C3
1
0.
1
U
Z
R8
1
0J