Circuit Descriptions
7.
7.4
Front-End Analogue and DVB-T, DVB-C,
DVB-T2/S2 reception
7.4.1
Front-END DVB-T, DVB-C reception DTV part
The Front-End for tuner consist of the following key
components:
•
ST25CS-2-E
•
SCALER MT5580PUEI/B PBGA-511 TV Processor
Below find a block diagram of the front-end application
Figure 7-6 Front-End DVB-T/C DTV block diagram
7.4.2
Front-End DVB-T2 reception DTV part
The Front-End for DVB-T2 DTV consist of the following key
components:
•
TDSY-G720D (DVB-T2)
•
SCALER MT5580PUEI/B PBGA-511 TV Processor
•
DEMODULATOR CXD2842ER-T4 VQFN-48
Below find a block diagram of the front-end application for
DVB-T2 DTV part.
Figure 7-7 Front-End DVB-T2 DTV block diagram
7.4.3
Front-End DVB-S2 reception DTV part
The Front-End for DVB-S2 DTV consist of the following key
components:
•
TDQS-A901F (DVB-S2)
•
SCALER MT5580PUEI/B PBGA-511 TV Processor
•
DEMODULATOR AVL6211LA LQFP-64
Below find a block diagram of the front-end application for
DVB-S2 DTV part.
Figure 7-8 Front-End DVB-S2 DTV block diagram
7.5
HDMI
Refer to figure
for the application.
Figure 7-9 HDMI input configuration
The following HDMI connector can be used:
•
HDMI 1: HDMI input (TV digital interface support HDCP)
with digital audio / PC DVI input/ARC
•
HDMI side: HDMI input (TV digital interface support HDCP)
with digital audio / PC DVI input
•
+5V detection mechanism
•
Stable clock detection mechanism
•
Integrated EDID
•
HPD control
•
Sync detection
•
TMDS output control
•
CEC control
MT5580
I
2
C
I
2
C
IF_AGC
IF
IF_AGC
ST25CS-2-E
19820_203.eps
IF
T
S
DA
T
A
RF_AGC
MT5580
T2 demod
CDX2842ER
IF_AGC
TDSY-G720D
I
2
C
I
2
C
I
2
C
19600_204.eps
IF
T
S
DA
T
A
RF_AGC
MT5580
S2 demod
AVL6211LA
IF_AGC
TDQS-A901F
I
2
C
I
2
C
I
2
C
19820_204.eps
19820_205.eps
MT5580
HDMI1
HDMI SIDE
CN501
CN503
RX
RX
I2C
I2C