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PHD User Guide
27
Below is an image of the SERF Development board. All the switches and ports are labeled. There are
several jumpers to enable certain features.
Figure 8.2. SERF board image showing labels
8.2.1.
Switches and Connectors
The following table describes the corresponding ports and switches associated with each I/O.
PHD Switches and Connectors
Name
Description
Usage comments
PWR switch
Turns on and off power to
the PHD, 9-32VDC
Power is supplied through JP1 connector. Turns on
Power but cannot be used as a wake signal.
JP2 connector
Development connector
Connector is reserved for factory use
RS232
connector
Connector for RS232
communication to PC.
Note: an adapter may be
required.
Intended for output strings from Lua scripts. For
debugging during development.
CAN 1 and 2
connector
Connector for CAN
Communication to PC.
Note: an adapter may be
required.
Intended for tracing CAN messages or inserting
CAN messages to the PHD for development.
GPIO_x
switches
General Purpose I/O
inputs.
Used to switch the GPIO to VBATT (high), GND (low)
or floating state during development.
Note: the corresponding jumpers must be
positioned as shown in Jumper section.