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SCHEMATIC DIAGRAM OF SENSOR BOARD
CCDSUB
OV2
OV1
OV4
OV3
OV4
OV3
OV2
OV1
CCD_OUT
ALC_DC
R
CCD_OUT
H2
H1
OSCIN
SDAT
CS
SCLK
MOB
CH2
CH1
V1
OV4
V2
V3
OV3
CCDSUB
V4
SUB
FWHD
FVD
ALC_VREF
SCK0
SOUT0
SLD0
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
D[8]
D[9]
D[10]
D[11]
ADCLK
R
H2
H1
FVD
D[0]
RESET3.3V
HCLR
PHOTO_OUT
ALC_VREF
OV2
OV1
HCLR
CS
V3
V2
V4
D[6]
D[3]
D[7]
D[11]
SDAT
SCLK
SCK0
MOB
PHOTO_OUT
SOUT0
SUB
FWHD
ADCLK
D[2]
D[4]
SLD0
CH1
CH2
D[8]
V1
ALC_VREF
D[10]
D[9]
ALC_DC
OSCIN
RESET3.3V
D[1]
D[5]
Q5
1
2
3
4
5
6
C10
OPEN
R41
100
3.3V
IC7
1
A_OUTPUT
2
A–INPUT
3
A+INPUT
4
GND
5
B+INPUT
6
B–INPUT
7
B_OUTPUT
8
V+
R51
10k
GND
R40
0
GND
R69
OPEN
GND
2.5V
C22
270p
15V
R38
0
C28
2.2
R15
OPEN
R23
OPEN
R59
150k
R53
15k
R39
0
R11
OPEN
GND
L4
OPEN
–8V
R34
1M
R71
330k
TD5
R64
2.2k
R73
33k
R22
OPEN
ALC5V
R72
1k
5V
GND
TD4
R70
2.2k
IC3
OPEN
1
1A
2
1Y
3
2A
4
2Y
5
3A
6
3Y
7
GND
8
4Y
9
4A
10
5Y
11
5A
12
6Y
13
6A
14
VCC
R96
0
3.3V
5V
R24
OPEN
D2
1
2
3
5V
D6
OPEN
1
2
3
5V
5V
L7
OPEN
ALC_GND
R74
0
D7
OPEN
1
2
3
D5
OPEN
1
2
3
R79
0
R81
0
L10
R77
0
R87
8.2
OPEN
R80
0
L9
L8
R86
OPEN
R82
0
R83
0
L11
R78
0
R84
0
CN3
1
GND
2
DRIVE
3
DUMPER
4
VREF
Attachment1
Attachment2
R5
0
R6
2.2k
C4
0.047
R21
0
R18
OPEN
OPEN
15V
–8V
R25
1M
C6
0.047
R4
0
GND
R7
10
R3
0
C11
1
Q1
L1
OPEN
GND
SGND1
R1
0
L12
OPEN
R97
0
GND
ALC_GND
ALC5V
MGND
R13
0
R9
0
R27
0
R33
0
1
OD
2
GND_1
3
OFD
4
PW
5
faiRS
6
faiH1
7
faiH2
8
faiV4
9
faiV3
10
faiV2
11
faiV1
12
NC
13
GND_2
14
OS
IC1
1
faiV4
2
faiV3
3
faiV2
4
faiV1
5
GND_1
6
NC1
7
NC2
8
OS
9
OD
10
GND_2
11
OFD
12
PW
13
faiRS
14
NC3
15
faiH1
16
faiH2
Z2
1
2
3
4
5
6
7
8
R26
10
C5
0.1
L2
10
3.3V
Z1
1
2
3
4
5
6
7
8
R10
OPEN
R14
10
R12
10
2.5V
C9
0.1
C1
R28
GND
R45
5V
D9
OPEN
CN1
1
OUT1A
2
OUT1B
3
OUT2A
4
OUT2B
5
PI
6
3.3V
7
OUT
8
GND
Attachment1
Attachment2
L5
MGND
GND
R52
R47
L3
R46
MOT5V
R42
GND
3.3V
GND
GND
MOT3.3V
GND
R37
D8
C23
R54
2.5V
R49
OPEN
15V
C37
1
GND
R55
0
IC6
1
SUBO
2
VSS
3
BO1
4
VDD2a
5
TO1
6
VCC
7
TI1
8
PG1
9
BI1
10
SUBI
12
BI2
13
PG2
14
TI2
15
GND
16
VDD1
17
TO2
18
BO2
19
VDD2b
20
Vsb
11
NC
D4
OPEN
–8V
3.3V
R50
0
R48
0
C41
0.1
C24
C39
0.1
C32
0.1
C16
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
C19
C46
10p
C44
10p
C36
1000p
C2
OPEN
C12
0.01
C7
OPEN
C40
2200p
C47
OPEN
C48
OPEN
C49
OPEN
C13
100p
C15
33p
C17
100p
C42
0.047
C45
560p
C43
OPEN
C33
10
R2
0
C30
1
R8
47
C31
1000p
C8
0.1
C14
0.1
C34
0.01
C29
0.1
GND
GND
R16
OPEN
C25
0.1
0.1
Z4
1
2
3
4
5
6
7
8
Z6
1
2
3
4
5
6
7
8
L6
L14
3.3V
C38
4.7
3.3V
L13
33
GND
R30
0
R17
OPEN
R19
OPEN
R29
OPEN
R31
27k
GND
GND
5V
L15
8.2
C50
0.1
ALC5V
TD52 TD51
TD50
TD48
TD46
TD44
TD42
TD40
TD38
TD36 TD34
TD32
TD30 TD28 TD26 TD24
TD41
TD31
TD35
TD43
TD33
TD27
TD39
TD47
TD37
TD21
TD29
TD45
TD49
TD22
TD23
TD25
TD19
TD9
TD11
TD10
TD12
TD14
TD13
TD20
TD8
TD6
TD7
TD3
TD1
TD2
TD16
TD17
TD18
TD15
C3
10
C51
22
GND
CN2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
R32
R35
R36
R57
R60
R61
0
C54
0.1
C53
0.1
C52
C21
R62
D10
IC5
1
OE1
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND
11
Y8
12
Y7
13
Y6
14
Y5
15
Y4
16
Y3
17
Y2
18
Y1
19
OE2
20
Vcc
IC4
1
OE1
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND
11
Y8
12
Y7
13
Y6
14
Y5
15
Y4
16
Y3
17
Y2
18
Y1
19
OE2
20
Vcc
MOT3.3V
MOT5V
GND
C55
10
C35
22
R56
100
100
100
100
100
R58
100
R63
100
R65
100
R66
100
R67
100
R68
100
R75
100
C18
C20
TH1
2k
GND
R43
510k
R20
3.3k
ALC5V
IC9
23
SCLK
35
RNF4
34
OUT4B
16
RNF2
15
OUT2A
5
PGND5
14
VM12
27
VISEL
12
RNF1
7
VM5
26
RESET
4
OUT5B
2
IN2[IN4]
9
PI2
36
OUT4A
18
DGND_2
17
OUT2B
13
OUT1B
6
OUT5A
3
IN3
24
SDAT
25
OSCIN
8
PI1
1
IN1[EN4]
11
OUT1A
21
VCC
22
CS
31
OUT3A
32
VM3
33
VM4
10
DGND_1
19
MOB
20
EXT
28
DGND_3
29
OUT3B
30
RNF3[PGND3]
IC8
23
Bias
35
D4
34
D3
16
CLK_in
15
RG
5
D9
14
DVdd3
27
AVss2
12
H2
7
D11
26
VRB
4
D8
2
D6
9
DLLC
36
D5
18
VD_in
17
HD_in
13
DVss3
6
D10
3
D7
24
AVdd12
25
VRT
8
DVdd12
1
DVss1
11
H1
21
FBC
22
SHC
31
D0/MON
32
D1
33
D2
10
DVss2
19
AVss1
20
CDS_in
28
CS
29
Sdata
30
SCK
V4
SUB
D[7]
FVD
GND
D[4]
D[10]
ALC_DC
OSCIN
GND
PBLK
FWHD
CS
CH1
HCLR
–8V
V2
GND
GND
GND
2.5V
SLD0
D[2]
D[9]
D[5]
SDAT
D[0]
MGND
RESET3.3V
GND
V1
SCK0
D[11]
MOB
GND
SOUT0
ADCLK
3.3V
D[8]
GND
V3
D[3]
SCLK
15V
CH2
PHOTO_OUT
ALC_VREF
D[6]
D[1]
5V
IC2
TO
MAIN
BOARD
(1/2)
CN1
CCD
CCD
IMAGE
SENSOR
V DRIVER
ALC
(NOT USED)
<INDEX>
SENSOR BOARD
IC1 OPEN
IC2 B1,C1
IC3 OPEN
IC4 D1,E1
IC5 D1
IC6 B4,C4
IC7 B4
IC8 D2,D3
IC9 OPEN
Q1 B1
Q5 A4
D2 B2
D4 OPEN
D5 OPEN
D6 OPEN
D7 OPEN
D8 OPEN
D9 OPEN
D10 OPEN
SENSOR BOARD
1
A
B
C
D
E
2
3
4
5
6
4-1