Panasonic SA-AK78, Руководство по обслуживанию

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No. Mark I/O Function
52 EFM O EFM signal output
53 PCK O PLL extraction clock output
(fPCK = 4.321 MHz during
normal playback)
54 VCOF2 I/O VCO Loop filter for 33.8688
MHz conversation terminal for
16.9344 MHz crystal mode,
must use other circuit
55 SUBC O Sub-code serial data output
56 SBCK I Clock input for sub-code
serial data
57 VSS I GND
58 X1 IN I Crystal oscillating circuit input
(f = 16.9344MHz)
59 X2 OUT O Crystal oscillating circuit input
(f = 16.9344 MHz)
60 VDD I Power supply input (for
oscillating circuit)
61 BYTCK O Byte clock output
62 /CLDCK O Sub-code frame clock signal
output (fCLDCK = 7.35 kHz
during normal playback)
63 FCLK O Crystal frame clock signal
output (fCLK = 7.35 kHz,
double = 14.7 kHz)
64 IPFLAG O Interpolation flag output (“H” :
Interpolation)
65 FLAG O Flag output
No. Mark I/O Function
1 /RST - RESET output terminal
2 NC - N.C.
3 IN2 I Motor Drive (2) input
4 PC2 I Turntable motor drive signal (“L
:ON)
5 NC - N.C.
6 IN1 I Motor driver (1) input
7 NC I N.C.
8 PVCC1 I Power supply (1) for driver
9 PGND1 - Ground connection (1) for driver
10 NC - N.C.
11 D1- O Motor driver (1) reverse-action
output
12 D1+ O Motor driver (1) forward-action
output
13 D2- O Motor driver (2) reverse-action
output
14 D2+ O Motor driver (2) forward-action
output
No. Mark I/O Function
1 SP_IN I/O SPEANA input
2 DECK2 I/O Mech condition input 2
(HALF/RECIF/MODE/RECIR)
3 DECK1 I/O Mech condition input 1
(HALF/MODE/PHOT1/PHOT2)
4 KEY5 I/O Key 5 input
5 KEY4 I/O Key 4 input
6 KEY3 I/O Key 3 input
7 KEY2 I/O Key 2 input
8 KEY1 I/O Key 1 input
9 JOG1B I/O JOG 1 input B main volume
10 JOG1A I/O JOG 1 input A main volume
11 CRT I/O CT timer control
No. Mark I/O Function
66 CLVS O Spindle servo phase
synchronizing signal output
("H" : CLV, "L" : rough servo)
67 CRC O Sub-code CRC checked
output (“H’ :OK, “L” :NG)
68 DEMPH O De-emphassis ON signal
output (“H” :ON)
69 RESY O Frame re-synchronizing signal
output
70 IOSEL I Mode Switching Terminal
71 /TEST I Test input
72 AVDD1 I Power supply input (for
analog circuit)
73 OUTL O Left channel audio signal
output
74 AVSS1 I GND
75 OUTR O Right channel audio signal
output
76 RSEL I RF signal polarity assignment
input (at "H" level, RSEL="H",
at "L" level, RESL="L")
77 IOVOD I 5V supply input
78 PSEL I Test terminal (connected to
Gnd)
79 MSEL I SMCK oscillating frequency
designation input (“L”:4.2336
MHz, “H”:8.4672 MHz)
80 SSEL I SUBQ output mode select
(“H”:Q-code buffer mode)
No. Mark I/O Function
15 D3- O Motor driver (3) reverse-action
output
16 D3+ O Motor driver (3) forward-action
output
17 D4- O Motor driver (4) reverse-action
output
18 D4+ O Motor driver (4) forward-action
output
19 NC - N.C.
20 PGND2 - Ground connection (2) for driver
21 PVCC2 I Power supply (2) for driver
22 NC - N.C.
23 VCC I Power supply terminal
24 VREF I Reference voltage input
25 IN4 I Motor driver (4) input
26 IN3 I Motor driver (3) input
27 RSTIN I Reset terminal
28 NC - N.C.
No. Mark I/O Function
12 JOG2B I/O JOG 2 input B multi jog
13 JOG2A I/O JOG 2 input A multi jog
14 DSPRST I/O DSP reset output
15 DSPACK I/O DSP ACK input
16 SENSE I/O DSP sense input
17 ECO I/O ECO output
18 PCNT I/O PCNT output
19 MECHSC I/O Mecha control CS input
20 MECHCK I/O Mecha control clock input
21 MECHSO I/O Mecha control data output
22 MECHSI I/O Mecha control data input
23 MECHRQ I/O Mecha control request output
12.3. IC703 (AN8739SBE2) Focus coil/ Tracking coil/ Traverse motor/
Spindle motor driver
12.4. IC601 (M38199MF210F) System Microprocessor
14
SA-AK78