Panasonic GP6DU, Техническое руководство

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CN3301, a connector that resembles a DVI port, is designed to receive digital video
from the receiver box. The HDCP (High-bandwidth Digital Content Protection) circuit
monitors the applied signals for copyright protection. Serial data that originates in the
receiver box is converted to parallel by IC3303, and back to serial by IC3305. This is
done to remove noise that may have been introduced into the long cable that connects
the receiver box and the display unit.
Clock and data output by IC3305 are applied to an I
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C bus repeater circuit (IC3307)
before being applied to the EEPROM IC3308. The EEPROM contains the HDCP keys
used to block or allow the display of the content of a particular program. Data
communication is bi-directional allowing a complete handshake to take place before a
program is viewed.
The DR-board also performs sync selection of the input signals. Horizontal and vertical
sync of the tuner socket are directly connected to the sync select IC, IC3311. Sync
signals of the video input port are retrieved by IC3304 and provided to IC3311. The
output of the sync select switch is applied to the J-board via pins A30 and A32 of the
connector CN3303/J1.
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