Panasonic CQDFX501U - AUTO RADIO/CD DECK, Руководство по обслуживанию

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Pin
No.
Port Description I/O (V)
1 LMTR_FWD Forward Limiter O 5.2
2 LMTR_REV Reverse Limiter O 5.2
3 LO/SP Motor control O 0
4 REST Reset I 4.8
5 TEST (Connecting to
ground) - 0
6 /RST Reset I 4.9
7 X0 Crystal oscillator - 2.1
8 X1 Crystal oscillator - 2.6
9 VSS Ground - 0
10 SW4 Switch input I 0
11 BLKCK Sub-code block clock I 0
12 SW1 Switch input I 4.9
13 SW2 Switch input I 5.0
14 SW3 Switch input I 0
15 SUBQ Q code input I 2.5
16 STAT Status input I 5.0
17 SQCK Q code external clock O 5.1
18 SRST Reset output O 4.9
19 DMUTE Mute output O 0
20 MLD MPU command load O 4.8
21 MDATA MPU command data O 0.2
22 MCLCK MPU command clock O 4.6
23 POSC Oscillator control O 0
24 ACC ACC input I 0.2
25 C1 CD clock I 4.9
26 DATA CD data I/O 0
27 C2 CD clock I 5.2
28 VCC +5V power supply - 5.2
9. PACKAGE AND IC BLOCK DIAGRAM
9.1. Main block
PA51 : YEAU03A052C