Panasonic CQ-VD6503U, Руководство по обслуживанию

Страница: 8 / 78

IC401 : C2BBYY000199
Pin
No.
Port Description I/O Vol
(V)
1 MONI CNT TFT monitor power supply
control output O 4.9
2 BL CNT Backlight control output O 4.9
3 TILT LED
(NC) TILT button LED control - -
4 ASPECT LED
(NC) LED control of ASPECT button - -
5 EJECT LED EJECT_LED control O -
6 NAVI LED NAVI LED control O -
7 SRC LED SOURCE button LED control O -
8 NC NC(GND connection) I 0
9 SELF WRITE Self writing switch output O 0
10 TFT RESET System reset input - 5.0
11 NC NC(GND connection) I 0
12 NC NC(GND connection) I 0
13 IC/ Vpp Internal connection and flash
memory programming mode
drawing in - 0
14 X2 Crystal oscillator clock I 2.7
15 X1 Crystal oscillator clock I 2.4
16 REGC Regulator output stability
capacity connection - 2.5
17 VSS Grand potential for in - 0
18 EVSS Grand potential for external - 0
19 VDD Positive power supply for in - 4.9
20 EVDD Positive power supply for
external - 4.9
21 SCL I2C bus clock output for DAC O 4.9
22 SDA I2C bus data output for DAC O 4.9
23 NC NC(OPEN) - -
24 NC NC(OPEN) - -
25 NC NC(OPEN) - -
26 NC NC(OPEN) - -
27 NC NC(OPEN) - -
28 NC NC(OPEN) - -
29 NC NC(OPEN) - -
30 NC NC(OPEN) - -
31 NC NC(OPEN) - -
32 NC NC(OPEN) - -
33 NC NC(OPEN) - -
34 NC NC(OPEN) - -
35 NC NC(OPEN) - -
36 NC NC(OPEN) - -
37 NC NC(OPEN) - -
38 HD IN HD signal input I 4.4
39 VD IN PAL N/PALM judgment VD
signal input I 4.7
40 NC NC(OPEN) - -
41 NC NC(OPEN) - -
42 NC NC(OPEN) - -
43 NC NC(OPEN) - -
44 NC NC(OPEN) - -
45 OSD CSEL
(NC) NC(OPEN) - -
46 X- Transistor SW output for touch
panel side X ( - pole) O 0
47 Y- Transistor SW output for touch
panel side Y ( - pole) O 0
48 X+ Transistor SW output for touch
panel side X ( + pole) O 4.9
49 Y+ Transistor SW output for touch
panel side Y ( + pole) O 4.9
50 RX For Flash rewriting I 0.5
51 TX For Flash rewriting O 0
52 IP SO IP Serial data output O 0
53 IP SI IP Serial data input I 0
Pin
No.
Port Description I/O Vol
(V)
54 IP SCK IP Serial clock output O 0
55 IP STR IP STR control O 0
56 IP RESET IP RESET output O 0
57 NC NC(OPEN) - -
58 NC NC(OPEN) - -
59 AVREF Reference voltage input 0 of
A/D converter - 4.9
60 AVSS A/D converter grand potential - 0
61 XG Touch panel side X with respect
to - pole I 0
62 YG Touch panel side Y with respect
to - pole I 1.2
63 XR Touch panel side X with respect
to + pole I 0
64 YR Touch panel side Y with respect
to - pole I 1.2
65 LIGHT SENS DIMMER input I 3.9
66 A/D KEY A/D key input for TILT and
OPEN/CLOSE I 4.9
67 A/D KEY GND connection I 0
68 A/D KEY GND connection I 4.9
69 NC NC(OPEN) - -
70 TFT CLK Serial communications clock for
the main CPU I 4.9
71 TFT SO/ TFT
COM Serial communications data
input for the main CPU I 0.6
72 TFT SI/ TFT
DATA Serial communications data
output for the main CPU O 0.4
73 Touch SW Switch output for touch panel
SW detection O 4.1
74 NC NC(OPEN) - -
75 NC NC(OPEN) - -
76 NC NC(OPEN) - -
77 NC NC(OPEN) - -
78 NC NC(OPEN) - -
79 NC NC(OPEN) - -
80 BUS KILL For connected confirmation of
self adjustment treatment
device I 0
9.2. TFT Block
8
CQ-VD6503U